Efficient Transmitter/Receiver Architectures for High Performance Wireless Applications

The thesis focuses on efficient design methods and reconfiguration architectures suitable for higher performance wireless communication .The work presented in this thesis describes the development of compact,inexpensive and low power communication devices that are robust,testable and capable of handling multiple communication standards.A new multistandard Decimation Filter Design Toolbox is developed in MATLAB GUIDE environment.RNS based dual-mode decimation filters reconfigurable for WCDMA/WiMAX and WCDMA/WLANa standards are designed and implemented.It offers high speed operation with lesser area requirement and lower dynamic power dissipation.A novel sigma-delta based direct analog-to-residue converter that reduces the complexity of RNS conversion circuitry is presented.The performance of an OFDM communication system with a new RRNS-convolutional concatenated coding is analysed and improved BER performance is obtained under different channel conditions. Easily testable MAC units for filters are presented using Reed-Muller logic for realization.

Theoretical and experimental study of intracavity laser absorption spectroscopy

In this thesis, a dual mode tunable gas sensor based on intracavity laser absorption spectroscopy (ICLAS) principle is investigated, both, numerically and experimentally. In order to minimize the cost and size of the gas sensor, relative intensity noise (RIN) is implemented as a detection parameter. Investigation is performed to determine the effect of injection current, operating temperature, mode spacing, and cavity length on RIN. It has been found that it is best to operate the gas sensor at smaller mode spacing and near the threshold current or at larger mode spacing and far above the threshold current for the use of RIN as the readout parameter.

Desaparición de la distancia en el estudio a distancia? : preliminares sobre la relevancia didáctica de cercanía y distancia.

Resumen basado en el de la publicación

Choosing the most suitable analogue redesign method for forward-type digital power converters

This work proposes a method to objectively determine the most suitable analogue redesign method for forward type converters under digital voltage mode control. Particular emphasis is placed on determining the method which allows the highest phase margin at the particular switching and crossover frequencies chosen by the designer. It is shown that at high crossover frequencies with respect to switching frequency, controllers designed using backward integration have the largest phase margin; whereas at low crossover frequencies with respect to switching frequency, controllers designed using bilinear integration have the largest phase margins. An accurate model of the power stage is used for simulation, and experimental results from a Buck converter are collected. The performance of the digital controllers is compared to that of the equivalent analogue controller both in simulation and experiment. Excellent correlation between the simulation and experimental results is presented. This work will allow designers to confidently choose the analogue redesign method which yields the greater phase margin for their application.

Systematic selection of analogue redesign method for forward-type digital power converters

This article proposes a systematic approach to determine the most suitable analogue redesign method to be used for forward-type converters under digital voltage mode control. The focus of the method is to achieve the highest phase margin at the particular switching and crossover frequencies chosen by the designer. It is shown that at high crossover frequencies with respect to switching frequency, controllers designed using backward integration have the largest phase margin; whereas at low crossover frequencies with respect to switching frequency, controllers designed using bilinear integration with pre-warping have the largest phase margins. An algorithm has been developed to determine the frequency of the crossing point where the recommended discretisation method changes. An accurate model of the power stage is used for simulation and experimental results from a Buck converter are collected. The performance of the digital controllers is compared to that of the equivalent analogue controller both in simulation and experiment. Excellent closeness between the simulation and experimental results is presented. This work provides a concrete example to allow academics and engineers to systematically choose a discretisation method.

Finite-time consensus algorithm of multi-agent networks

This paper is concerned with leader-follower finite-time consensus control of multi-agent networks with input disturbances. Terminal sliding mode control scheme is used to design the distributed control law. A new terminal sliding mode surface is proposed to guarantee finite-time consensus under fixed topology, with the common assumption that the position and the velocity of the active leader is known to its neighbors only. By using the finite-time Lyapunov stability theorem, it is shown that if the directed graph of the network has a directed spanning tree, then the terminal sliding mode control law can guarantee finite-time consensus even under the assumption that the time-varying control input of the active leader is unknown to any follower.

Fast finite-time consensus of a class of high-order uncertain nonlinear systems

This paper poses and solves a new problem of consensus control where the task is to make the fixed-topology multi-agent network, with each agent described by an uncertain nonlinear system in chained form, to reach consensus in a fast finite time. Our development starts with a set of new sliding mode surfaces. It is proven that, on these sliding mode surfaces, consensus can be achieved if the communication graph has the proposed directed spanning tree. Next, we introduce the multi-surface sliding mode control to drive the sliding variables to the sliding mode surfaces in a fast finite time. The control Lyapunov function for fast finite time stability, motivated by the fast terminal sliding mode control, is used to prove the reachability of the sliding mode surface. A recursive design procedure is provided, which guarantees the boundedness of the control input.

Quality in flexible, online and distance education at Deakin University, Australia

This chapter presents an overview of the management of quality for flexible, online and distance education (off-campus education) at Deakin University in Australia. In 1974, Deakin University was established as a dual-mode institution educating large numbers of both on- and off-campus students. From its foundation it has increasingly sought to provide the same learning resources, equivalent learning experiences and parity of outcomes to students studying in all modes (Hay, Lowe, Gibb & Anderson, 2002). While this was the ideal on which Deakin was founded, in practice approaches differed across various schools and courses where in some areas integration was achieved through an open-campus model, while in others the tendency was towards separation of the modes of delivery by course. Deakin’s history can be characterised as moving from dual-mode approaches to educating its student cohorts, to a now well articulated, integrated and institution-wide approach to assuring and improving the quality of all modes of educational delivery for an extremely diverse and complex set of student cohorts. In this regard, it makes no particular distinction between these student groups in its policies, procedures and processes relating to educational matters.

A novel single-phase ZCS-PWM high-power-factor boost rectifier

This paper presents a novel single-phase high-power-factor (HPF) pulsewidth-modulated (PWM) boost rectifier featuring soft commutation of the active switches at zero current (ZC), It incorporates the most desirable properties of conventional PWM and soft-switching resonant techniques.The input current shaping is achieved with average current mode control and continuous inductor current mode.This new PWM converter provides ZC turn on and turn off of the active switches, and it is suitable for high-power applications employing insulated gate bipolar transistors (IGBT's),The principle of operation, the theoretical analysis, a design example, and experimental results from a laboratory prototype rated at 1600 W with 400-Vdc output voltage are presented. The measured efficiency and the power factor were 96.2% and 0.99%, respectively, with an input current total harmonic distortion (THD) equal to 3.94%, for an input voltage with THD equal to 3.8%, at rated load.

A novel voltage step-down/up ZCS-PWM Zeta converter

This paper presents an analysis of a novel pulse-width-modulated (PWM) voltage step-down/up Zeta converter, featuring zero-current-switching (ZCS) at the active switches. The applications in de to de and ac to de (rectifier) operation modes are used as examples to illustrate the performance of this new ZCS-PWM Zeta converter. Regarding to the new ZCS-PWM Zeta rectifier proposed, it should be noticed that the average-current mode control is used in order to obtain a structure with high power-factor (HPF) and low total harmonic distortion (THD) at the input current.Two active switches (main and auxiliary transistors), two diodes, two small resonant inductors and one small resonant capacitor compose the novel ZCS-PWM soft-commutation cell, used in these new ZCS-PWM Zeta converters. In this cell, the turn-on of the active switches occurs in zero-current (ZC) and their turn-off in zero-current and zero-voltage (ZCZV). For the diodes, their turn-on process occurs in zero-voltage (ZV) and their reverse-recovery effects over the active switches are negligible. These characteristics make this cell suitable for Insulated-Gate Bipolar Transistors (IGBTs) applications.The main advantages of these new Zeta converters, generated from the new soft-commutation cell proposed, are possibility of obtaining isolation (through their accumulation inductors), and high efficiency, at wide load range. In addition, for the rectifier application, a high power factor and low THD in the input current ran be obtained, in agreement with LEC 1000-3-2 standards.The principle of operation, the theoretical analysis and a design example for the new de to de Zeta converter operating in voltage step-down mode are presented. Experimental results are obtained from a test unit with 500W output power, 110V(dc) output voltage, 220V(dc) input voltage, operating at 50kHz switching frequency. The efficiency measured at rated toad is equal to 97.3%for this new Zeta converter.Finally, the new Zeta rectifier is analyzed, and experimental results from a test unit rated at 500W output power, 110V(dc) output voltage, 220V(rms) input voltage, and operating at 50kHz switching frequency, are presented. The measured efficiency is equal to 96.95%, the power-factor is equal to 0.98, and the input current THD is equal to 19.07%, for this new rectifier operating at rated load.

Novel high-power-factor ZCS-PWM preregulators

This paper introduces novel zero-current-switching (ZCS) pulsewidth-modulated (PWM) preregulators based on a new soft-commutation cell, suitable for insulated gate bipolar transistor applications. The active switches in these proposed rectifiers turn on in zero current and turn off in zero current-zero voltage. In addition, the diodes turn on in zero voltage and their reverse-recovery effects over the active switches are negligible. Moreover, based on the proposed cell, an entire family of de-to-de ZCS-PWM converters can be generated, providing conditions to obtain naturally isolated converters, for example, derived buck-boost, Sepic. and Zeta converters. The novel ac-to-dc ZCS-PWM boost and Zeta preregulators are presented in order to verify the operation of this soft-commutation cell, In order to minimize the harmonic contents of the input current, increasing the ac power factor, the average-current-mode control is used, obtaining preregulators with ac power factor near unity and high efficiency at wide load range. The principle of operation, theoretical analysis, design example, and experimental results from test units for the novel preregulators are presented. The new boost preregulator was designed to nominal values of 1.6 kW output power, 220 V(rms) input voltage, 400 V(dc) output voltage, and operating at 20 kHz. The measured efficiency and power factor of the new ZCS-PWM boost preregulator were 96.7% and 0,99, respectively, with an input current total harmonic distortion (THD) equal to 3.42% for an input voltage with THD equal to 1.61%, at rated load, the new ZCS-PWM Zeta preregulator was designed to voltage step-down operation, and the experimental results were obtained from a laboratory prototype rated at 500 W, 220 V(rm), input voltage, 110 V(dc) output voltage, and operating at 50 kHz. The measured efficiency of the new ZCS-PWM Zeta preregulator is approximately 96.9% and the input power factor is 0.98, with an input current THD equal to 19.07% while the input voltage THD is equal to 1.96%, at rated load.

Automatic dimming multi-lamp fluorescent management system with active input power factor corrector stage

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Sistema automático para o controle eficiente de iluminação para multiplas lâmpadas fluorescentes

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Novos conversores retificadores Sepic ZCS-PWM, operando como abaixadores de tensao, com elevados rendimento e fator de potencia - um estudo comparativo

A comparative evaluation regarding a new zero-current-switching (ZCS) pulse width modulated (PWM) Sepic rectifier, operating in voltage step-down mode, employing two different techniques, in order to obtain high power factor and reduced total harmonic distortion (THD) at the input current, is presented. The methods are those in continuous-current mode operation, known as peak current mode control with slope compensation, and average-current mode control. The principle of operation, the theoretical analysis, a design example and the main experimental results are presented for both proposed control techniques.

Detecção de falhas em sistemas incertos com atraso no sinal de controle

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)