Electrical detection of trapped charge displacements using an ultra-thin SOI percolation transistor

Electrical detection of solid-state charge qubits requires ultrasensitive charge measurement, typically using a quantum point contact or single-electron-transistor, which imposes strict limits on operating temperature, voltage and current. A conventional FET offers relaxed operating conditions, but the back-action of the channel charge is a problem for such small quantum systems. Here, we discuss the use of a percolation transistor as a measurement device, with regard to charge sensing and backaction. The transistor is based on a 10nm thick SOI channel layer and is designed to measure the displacement of trapped charges in a nearby dielectric. At cryogenic temperatures, the trapped charges result in strong disorder in the channel layer, so that current is constrained to a percolation pathway in sub-threshold conditions. A microwave driven spatial Rabi oscillation of the trapped charge causes a change in the percolation pathway, which results in a measurable change in channel current. © The Electrochemical Society.

Electrical/optical dual-function redox potential transistor

We demonstrate a new type of transistors, the electrical/optical "dual-function redox-potential transistors", which is solution processable and environmentally stable. This device consists of vertically staked electrodes that act as gate, emitter and collector. It can perform as a normal transistor, whilst one electrode which is sensitised by dye enables to generate photocurrent when illuminated. Solution processable oxide-nanoparticles were used to form various functional layers, which allow an electrolyte to penetrate through and, consequently, the current between emitter and collector can be controlled by the gate potential modulated distribution of ions. The result here shows that the device performs with high ON-current under low driving voltage (<1â€...V), while the transistor performance can readily be controlled by photo-illumination. Such device with combined optical and electrical functionalities allows single device to perform the tasks that are usually done by a circuit/system with multiple optical and electrical components, and it is promising for various applications.

High-performance nanowire oxide photo-thin film transistor.

A gate-modulated nanowire oxide photosensor is fabricated by electron-beam lithography and conventional dry etch processing.. The device characteristics are good, including endurance of up to 10(6) test cycles, and gate-pulse excitation is used to remove persistent photoconductivity. The viability of nanowire oxide phototransistors for high speed and high resolution applications is demonstrated, thus potentially expanding the scope of exploitation of touch-free interactive displays.

Towards the formation of neuro-transistor artificial chemical synapse

Highly sensitive biosensor for detection of acetylcholine (ACh) and competitive acetylcholinesterase (AChE) inhibitor, eserine, is investigated. Peculiar microelectronic configuration of an ion-sensitive field-effect transistor (ISFET) in addition to a right choice of the pH-transducing nanolayers allows recording a response of the enzyme-modified ISFET (EnFET) to a wide range of ACh concentrations. We demonstrate a remarkable improvement of at least three orders of magnitude in dose response to ACh. Described bioelectronic system reveals clear response, when the catalytic activity of the immobilized AChE is inhibited in a reversible manner by eserine, competitive inhibitor of AChE. ©2007 IEEE.

High performance non-volatile ferroelectric copolymer memory based on a ZnO nanowire transistor fabricated on a transparent substrate

A high performance ferroelectric non-volatile memory device based on a top-gate ZnO nanowire (NW) transistor fabricated on a glass substrate is demonstrated. The ZnO NW channel was spin-coated with a poly (vinylidenefluoride-co-trifluoroethylene) (P(VDF-TrFE)) layer acting as a top-gate dielectric without buffer layer. Electrical conductance modulation and memory hysteresis are achieved by a gate electric field induced reversible electrical polarization switching of the P(VDF-TrFE) thin film. Furthermore, the fabricated device exhibits a memory window of ∼16.5 V, a high drain current on/off ratio of ∼105, a gate leakage current below ∼300 pA, and excellent retention characteristics for over 104 s. © 2014 AIP Publishing LLC.

Gigahertz multi-transistor graphene integrated circuits

We review the potential of graphene in ultra-high speed circuits. To date, most of high-frequency graphene circuits typically consist of a single transistor integrated with a few passive components. The development of multi-transistor graphene integrated circuits operating at GHz frequencies can pave the way for applications in which high operating speed is traded off against power consumption and circuit complexity. Novel vertical and planar devices based on a combination of graphene and layered materials could broaden the scope and performances of future devices. © 2013 IEEE.

Amorphous silicon thin film transistor biosensing system

Electronic systems are a very good platform for sensing biological signals for fast point-of-care diagnostics or threat detection. One of the solutions is the lab-on-a-chip integrated circuit (IC), which is low cost and high reliability, offering the possibility for label-free detection. In recent years, similar integrated biosensors based on the conventional complementary metal oxide semiconductor (CMOS) technology have been reported. However, post-fabrication processes are essential for all classes of CMOS biochips, requiring biocompatible electrode deposition and circuit encapsulation. In this work, we present an amorphous silicon (a-Si) thin film transistor (TFT) array based sensing approach, which greatly simplifies the fabrication procedures and even decreases the cost of the biosensor. The device contains several identical sensor pixels with amplifiers to boost the sensitivity. Ring oscillator and logic circuits are also integrated to achieve different measurement methodologies, including electro-analytical methods such as amperometric and cyclic voltammetric modes. The system also supports different operational modes. For example, depending on the required detection arrangement, a sample droplet could be placed on the sensing pads or the device could be immersed into the sample solution for real time in-situ measurement. The entire system is designed and fabricated using a low temperature TFT process that is compatible to plastic substrates. No additional processing is required prior to biological measurement. A Cr/Au double layer is used for the biological-electronic interface. The success of the TFT-based system used in this work will open new avenues for flexible label-free or low-cost disposable biosensors. © 2013 Materials Research Society.

Influence of V/III ratio on the structural and photoluminescence properties of In0.52AlAs/In0.53GaAs metamorphic high electron mobility transistor grown by molecular beam epitaxy

A series of metamorphic high electron mobility transistors (MMHEMTs) with different V/III flux ratios are grown on GaAs (001) substrates by molecular beam epitaxy (XIBE). The samples are analysed by using atomic force microscopy (AFM), Hall measurement, and low temperature photoluminescence (PL). The optimum V/III ratio in a range from 15 to 60 for the growth of MMHEMTs is found to be around 40. At this ratio, the root mean square (RMS) roughness of the material is only 2.02 nm; a room-temperature mobility and a sheet electron density are obtained to be 10610.0cm(2)/(V.s) and 3.26 x 10(12)cm(-2) respectively. These results are equivalent to those obtained for the same structure grown on InP substrate. There are two peaks in the PL spectrum of the structure, corresponding to two sub-energy levels of the In0.53Ga0.47 As quantum well. It is found that the photoluminescence intensities of the two peaks vary with the V/III ratio, for which the reasons are discussed.

Properties of AlyGa1-yN/AlxGa1-xN/AlN/GaN Double-Barrier High Electron Mobility Transistor Structure

Electrical properties of AlyGa1-yN/AlxGa1-xN/AlN/GaN structure are investigated by solving coupled Schrodinger and Poisson equation self-consistently. Our calculations show that the two-dimensional electron gas (2DEG) density will decrease with the thickness of the second barrier (AlyGa1-yN) once the AlN content of the second barrier is smaller than a critical value y(c), and will increase with the thickness of the second barrier (AlyGa1-yN) when the critical AlN content of the second barrier y(c) is exceeded. Our calculations also show that the critical AlN content of the second barrier y(c) will increase with the AlN content and the thickness of the first barrier layer (AlxGa1-xN).

Quantum mechanical simulation of nanosized metal-oxide-semiconductor field-effect transistor using empirical pseudopotentials: A comparison for charge density occupation methods

The atomistic pseudopotential quantum mechanical calculations are used to study the transport in million atom nanosized metal-oxide-semiconductor field-effect transistors. In the charge self-consistent calculation, the quantum mechanical eigenstates of closed systems instead of scattering states of open systems are calculated. The question of how to use these eigenstates to simulate a nonequilibrium system, and how to calculate the electric currents, is addressed. Two methods to occupy the electron eigenstates to yield the charge density in a nonequilibrium condition are tested and compared. One is a partition method and another is a quasi-Fermi level method. Two methods are also used to evaluate the current: one uses the ballistic and tunneling current approximation, another uses the drift-diffusion method. (C) 2009 American Institute of Physics. [doi:10.1063/1.3248262]

Single-electron multiple-valued memory using ultra-small floating gate metal-oxide-semiconductor field effect transistor

This paper proposes a novel single-electron multiple-valued memory. It is a metal-oxide-semiconductor field effect transistor (MOS)-type memory with multiple separate control gates and floating gate layer, which consists of nano-crystal grains. The electron can tunnel among the grains (floating gates) and between the floating gate layer and the MOS channel. The memory can realize operations of 'write', 'store' and 'erase' of multiple-valued signals exceeding three values by controlling the single electron tunneling behavior. We use Monte Carlo method to simulate the operation of single-electron four-valued memory. The simulation results show that it can operate well at room temperature.