Low on-resistance SOI dual-trench-gate MOSFET

A low specific on-resistance (R-{{\rm on}, {\rm sp}}) integrable silicon-on-insulator (SOI) MOSFET is proposed, and its mechanism is investigated by simulation. The SOI MOSFET features double trenches and dual gates (DTDG SOI): an oxide trench in the drift region, a buried gate inset in the oxide trench, and another trench gate (TG) extended to a buried oxide layer. First, the dual gates form dual conduction channels, and the extended gate widens the vertical conduction area; both of which sharply reduce R-{{\rm on}, {\rm sp}}. Second, the oxide trench folds the drift region in the vertical direction, resulting in a reduced device pitch and R-{{\rm on}, {\rm sp}}. Third, the oxide trench causes multidirectional depletion. This not only enhances the reduced surface field effect and thus reshapes the electric field distribution but also increases the drift doping concentration, leading to a reduced R-{{\rm on}, {\rm sp}} and an improved breakdown voltage (BV). Compared with a conventional SOI lateral Double-diffused metal oxide semiconductor (LDMOS), the DTDG MOSFET increases BV from 39 to 92 V at the same cell pitch or decreases R-{{\rm on}, { \rm sp}} by 77% at the same BV by simulation. Finally, the TG extended synchronously acts as an isolation trench between the high/low-voltage regions in a high-voltage integrated circuit, saving the chip area and simplifying the isolation process. © 2006 IEEE.

Zinc oxide nanowire based hydrogen sensor on SOI CMOS platform

Here we report on the successful low-temperature growth of zinc oxide nanowires (ZnONWs) on silicon-on-insulator (SOI) CMOS micro-hotplates and their response, at different operating temperatures, to hydrogen in air. The SOI micro-hotplates were fabricated in a commercial CMOS foundry followed by a deep reactive ion etch (DRIE) in a MEMS foundry to form ultra-low power membranes. The micro-hotplates comprise p+ silicon micro-heaters and interdigitated metal electrodes (measuring the change in resistance of the gas sensitive nanomaterial). The ZnONWs were grown as a post-CMOS process onto the hotplates using a CMOS friendly hydrothermal method. The ZnONWs showed a good response to 500 to 5000 ppm of hydrogen in air. We believe that the integration of ZnONWs with a MEMS platform results in a low power, low cost, hydrogen sensor that would be suitable for handheld battery-operated gas sensors. © 2011 Published by Elsevier Ltd.

200-V lateral superjunction LIGBT on partial SOI

This letter presents a novel lateral superjunction lateral insulated-gate bipolar transistor (LIGBT) in partial silicon-on-insulator (SOI) technology in 0.18-μm partial-SOI (PSOI) high-voltage (HV) process. For an n-type superjunction LIGBT, the p-layer in the superjunction drift region not only helps in achieving uniform electric field distribution but also contributes to the on-state current. The superjunction LIGBT successfully achieves a breakdown voltage (BV) of 210 V with an R dson of 765 mΩ ̇ mm 2. It exhibits half the value of specific on-state resistance R dson and three times higher saturation current (I dsat) for the same BV, compared to a comparable lateral superjunction laterally diffused metal-oxide-semiconductor fabricated in the same technology. It also performs well in higher temperature dc operation with 38.8% increase in R dson at 175°C, compared to the room temperature without any degradation in latch-up performance. To realize this device, it only requires one additional mask layer into X-FAB 0.18-μm PSOI HV process. © 2012 IEEE.

Room-temperature emission at telecom wavelengths from silicon photonic crystal nanocavities

Strongly enhanced light emission at wavelengths between 1.3 and 1.6 μm is reported at room temperature in silicon photonic crystal (PhC) nanocavities with optimized out-coupling efficiency. Sharp peaks corresponding to the resonant modes of PhC nanocavities dominate the broad sub-bandgap emission from optically active defects in the crystalline Si membrane. We measure a 300-fold enhancement of the emission from the PhC nanocavity due to a combination of far-field enhancement and the Purcell effect. The cavity enhanced emission has a very weak temperature dependence, namely less than a factor of 2 reduction between 10 K and room temperature, which makes this approach suitable for the realization of efficient light sources as well as providing a quick and easy tool for the broadband optical characterization of silicon-on-insulator nanostructures. © 2011 American Institute of Physics.

Locally oxidized silicon surface-plasmon Schottky detector for telecom regime.

We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip.

Locally oxidized silicon surface-plasmon Schottky detector for telecom regime

We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip. © 2011 American Chemical Society.

200V superjunction lateral IGBT fabricated on partial SOI

A 200V lateral insulated gate bipolar transistor (LIGBT) was successfully developed using lateral superjunction (SJ) in 0.18μm partial silicon on insulator (SOI) HV process. The results presented are based on extensive experimental measurements and numerical simulations. For an n-type lateral SJ LIGBT, the p layer in the SJ drift region helps in achieving uniform electric field distribution. Furthermore, the p-pillar contributes to the on-state current. Furthermore, the p-pillar contributes to sweep out holes during the turn-off process, thus leading to faster removal of plasma. To realize this device, one additional mask layer is required in the X-FAB 0.18μm partial SOI HV process. © 2013 IEEE.

Wafer-Level Testable High-Speed Silicon Microring Modulator Integrated with Grating Couplers

A wafer-level testable silicon-on-insulator-based microring modulator is demonstrated with high modulation speed, to which the grating couplers are integrated as the fiber-to-chip interfaces. Cost-efficient fabrications are realized with the help of optical structure and etching depth designs. Grating couplers and waveguides are patterned and etched together with the same slab thickness. Finally we obtain a 3-dB coupling bandwidth of about 60nm and 10 Gb/s nonreturn-to-zero modulation by wafer-level optical and electrical measurements.

Study of GaN growth on ultra-thin Si membranes

10 mu m-thick ultra-thin Si (111) membranes for GaN epi-layers growth were successfully fabricated on silicon-on-insulator (SOI) substrate by backside etching the handle Si and buried oxide (BOX) layer. Then 1 mu m-thick GaN layers were deposited on these Si membranes by metal-organic chemical vapor deposition (MOCVD). The crack-free areas of 250 mu m, x 250 mu m were obtained on the GaN layers due to the reduction of thermal stress by using these ultra-thin Si membranes, which was further confirmed by the photoluminescence (PL) spectra and the simulation results from the finite element method calculation by using the software of ANSYS. In this paper, a newly developed approach was demonstrated to utilize micromechanical structures for GaN growth, which would improve the material quality of the epi-layers and facilitate GaN-based micro electro-mechanical system (MEMS) fabrication, especially the pressure sensor, in the future applications. (C) 2008 Elsevier Ltd. All rights reserved.

A photonic wire-based directional coupler based on SOI

A photonic wire-based directional coupler based on SOI was fabricated by e-beam lithography (EBL) and the inductively coupled plasma (ICP) etching method. The size of the sub-micron waveguide is 0.34 mu m x 0.34 mu m, and the length in the coupling region and the separation between the two parallel waveguides are 410 and 0.8 mu m, respectively. The measurement results are in good agreement with the results simulated by 3D finite-difference time-domain method. The transmission power from two output ports changed reciprocally with about 23 nm wavelength spacing between the coupled and direct ports. The extinction ratio of the device was between 5 and 10 dB, and the insertion loss of the device in the wavelength range 1520-1610 nm was between 22 and 24 dB, which included an about 18.4 +/- 0.4 dB coupling loss between the taper fibers and the polished sides of the device. (c) 2008 Elsevier B.V. All rights reserved.

Paired interference 3-dB coupler based on SOI rib waveguides with anisotropic chemical wet etching

A 3-dB paired interference (PI) optical coupler in silicon-on-insulator (SOI) based on rib waveguides with trapezoidal cross section was designed with simulation by a modified finite-difference beam propagation method (FD-BPM) and fabricated by potassium hydroxide (KOH) anisotropic chemical wet etching. Theoretically, tolerances of width, length, and port distance are more than 1, 100, and 1 mu m, respectively. Smooth interface was obtained with the propagation loss of 1.1 dB/cm at the wavelength of 1.55 mu m. The coupler has a good uniformity of 0.2 dB and low excess loss of less than 2 dB.

High-speed 2 x 2 silicon-based electro-optic switch with nanosecond switch time

A 2 x 2 electro-optic switch is experimentally demonstrated using the optical structure of a Mach-Zehnder interferometer (MZI) based on a submicron rib waveguide and the electrical structure of a PIN diode on silicon-on-insulator (SOI). The switch behaviour is achieved through the plasma dispersion effect of silicon. The device has a modulation arm of I mm in length and cross-section of 400 nmx340 nm. The measurement results show that the switch has a V pi L pi figure of merit of 0.145 V-cm and the extinction ratios of two output ports and cross talk are 40 dB, 28 dB and -28 dB, respectively. A 3 dB modulation bandwidth of 90 MHz and a switch time of 6.8 ns for the rise edge and 2.7 ns for the fall edge are also demonstrated.

Compact four-channel reconfigurable optical add-drop multiplexer using silicon photonic wire

We designed and fabricated a four-channel reconfigurable optical add-drop multiplexer based on silicon photonic wire waveguide, which is controlled through the thermo-optic effect. The effective footprint of the device is about 1000 x 500 mu m(2). The minimum insertion loss including the transmission loss and coupling loss is about 10.7 dB. The tuning bandwidth is about 17 nm, the average tuning efficiency about 6.11 mW/nm and the tuning speed about 24.5 kHz. (c) 2009 Elsevier B.V. All rights reserved.

Experimental Demonstration on Structure-Parameter Dependence of Photonic Crystal Optical Spectrum

We present fabrication and experimental measurement of a series of photonic crystal waveguides and coupled structure of PC waveguide and PC micro-cavity. The complete devices consist of an injector taper down from 3 mu m into a triangular-lattice air-holes single-line-defect waveguide. We fabricated these devices on a silicon-on-insulator substrate and characterized them using tunable laser source. We've obtained high-efficiency light propagation and broad flat spectrum response of photonic-crystal waveguides. A sharp attenuation at photonic crystal waveguide mode edge was observed for most structures. The edge of guided band is shifted about 31 nm with the 10 nm increase of lattice constant. Mode resonance was observed in coupled structure. Our experimental results indicate that the optical spectra of photonic crystal are very sensitive to structure parameters.

1 x 4 Ge-on-SOI PIN Photodetector Array for Parallel Optical Interconnects

High-quality Ge film was epitaxially grown on silicon on insulator using the ultrahigh vacuum chemical vapor deposition. In this paper, we demonstrated that the efficient 1 4 germanium-on-silicon p-i-n photodetector arrays with 1.0 mu m Ge film had a responsivity as high as 0.65 A/W at 1.31 mu m and 0.32 A/W at 1.55 mu m, respectively. The dark current density was about 0.75 mA/cm(2) at 0 V and 13.9 mA/cm(2) at 1.0 V reverse bias. The detectors with a diameter of 25 mu m were measured at 1550 nm incident light under 0 V bias, and the result showed that the 3-dB bandwidth is 2.48 GHz. At a reverse bias of 3 V, the bandwidth is about 13.3 GHz. The four devices showed a good consistency.