Via-configurable transistor array: a regular design technique to improve ICs yield

Process variations are a major bottleneck for digital CMOS integrated circuits manufacturability and yield. That iswhy regular techniques with different degrees of regularity are emerging as possible solutions. Our proposal is a new regular layout design technique called Via-Configurable Transistors Array (VCTA) that pushes to the limit circuit layout regularity for devices and interconnects in order to maximize regularity benefits. VCTA is predicted to perform worse than the Standard Cell approach designs for a certain technology node but it will allow the use of a future technology on an earlier time. Ourobjective is to optimize VCTA for it to be comparable to the Standard Cell design in an older technology. Simulations for the first unoptimized version of our VCTA of delay and energy consumption for a Full Adder circuit in the 90 nm technology node are presented and also the extrapolation for Carry-RippleAdders from 4 bits to 64 bits.

Power quality improving with virtual flux-based voltage source line converter

Line converters have become an attractive AC/DC power conversion solution in industrial applications. Line converters are based on controllable semiconductor switches, typically insulated gate bipolar transistors. Compared to the traditional diode bridge-based power converters line converters have many advantageous characteristics, including bidirectional power flow, controllable de-link voltage and power factor and sinusoidal line current. This thesis considers the control of the lineconverter and its application to power quality improving. The line converter control system studied is based on the virtual flux linkage orientation and the direct torque control (DTC) principle. A new DTC-based current control scheme is introduced and analyzed. The overmodulation characteristics of the DTC converter are considered and an analytical equation for the maximum modulation index is derived. The integration of the active filtering features to the line converter isconsidered. Three different active filtering methods are implemented. A frequency-domain method, which is based on selective harmonic sequence elimination, anda time-domain method, which is effective in a wider frequency band, are used inharmonic current compensation. Also, a voltage feedback active filtering method, which mitigates harmonic sequences of the grid voltage, is implemented. The frequency-domain and the voltage feedback active filtering control systems are analyzed and controllers are designed. The designs are verified with practical measurements. The performance and the characteristics of the implemented active filtering methods are compared and the effect of the L- and the LCL-type line filteris discussed. The importance of the correct grid impedance estimate in the voltage feedback active filter control system is discussed and a new measurement-based method to obtain it is proposed. Also, a power conditioning system (PCS) application of the line converter is considered. A new method for correcting the voltage unbalance of the PCS-fed island network is proposed and experimentally validated.

Top-gate microcrystalline silicon TFTs processed at low temperature (<200ºC)

N-type as well P-type top-gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200 °C. The active layer is an undoped μc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs)-doped μc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2-N type c-Si structures using this insulator present low flat-band voltage,-0.2 V, and low density of states at the interface D it=6.4×10 10 eV -1 cm -2. High field effect mobility, 25 cm 2/V s for electrons and 1.1 cm 2/V s for holes, is obtained. These values are very high, particularly the hole mobility that was never reached previously.

Structure of a-Si:H/a-Si1-xCx:H multilayers deposited in a reactor with automated substrate holder

This paper deals with the structural properties of a-Si:H/a-Si1-xCx: H multilayers deposited by glow-discharge decomposition of SiH4 and SiH4 and CH4 mixtures. The main feature of the rf plasma reactor is an automated substrate holder. The plasma stabilization time and its influence on the multilayer obtained is discussed. A series of a-Si:H/a-Si1-xCx: H multilayers has been deposited and characterized by secondary ion mass spectrometry (SIMS), X-ray diffraction (XRD) and transmission electron microscopy (TEM). No asymmetry between the two types of interface has been observed. The results show that the multilayers present a very good periodicity and low roughness. The difficulty of determining the abruptness of the multilayer at the nanometer scale is discussed.

Virranahto ja jänniterasitukset taajuusmuuttajakäytöissä

Nykyiset IGB-transistorit voivat tuottaa jopa 30 ns nousureunoja, jolloin jänniterasitus jakautuu hyvin epätasaisesti käämien ja kierrosten kesken. Tämä ja eristeissä esiintyvät ilmataskut asettavat käämikierrosten välisten eristeiden jännitekestävyyden koetukselle, ja aiheuttavat riskin osittaispurkaukselle. Urassa hajavuon epätasaisen jakauman aiheuttama virranahto on yleensä ollut esillä suurissa koneissa, jotka toimivat 50 Hz:llä. Nykyään taajuusmuuttajien soveltaminen on mahdollistanut nimellistaajuudeltaan satojen hertsien suurnopeuskoneiden käämitysten valmistamisen pyörölangasta, jolloin virranahto tulee merkittäväksi, koska kierroksia on muutama urassa. Työssä mitattiin jännitteen jakautumista 3.5 MW:n tuulivoimageneraattorin segmentissä käyttäen käämitysten syöttöön erilaisia jännitteen nousuaikoja, ja pyrittiin arvioimaan onko kyseinen kone vaarassa kokea osittaispurkauksia elinikänsä aikana. Työssä on myös käsitelty virranahtoa käyttäen finiittielementtimenetelmää simuloimaan ja vertaamaan erilaisia tilanteita käämitystavoissa pyörölankakoneessa. Tämä on myös osittain sovellettavissa muotokuparilla käämittyihin koneisiin. Käämivyyhdin vyyhdenpään alueella tehdyn johdinnipun 180 asteen kierron vaikutusta simuloitiin ja sen aiheuttamaa parannusta varmennettiin käytännön mittauksilla.

Extension of the impedance field method to the noise analysis of a semiconductor junction: Analytical approach

We present an analytical procedure to perform the local noise analysis of a semiconductor junction when both the drift and diffusive parts of the current are important. The method takes into account space-inhomogeneous and hot-carriers conditions in the framework of the drift-diffusion model, and it can be effectively applied to the local noise analysis of different devices: n+nn+ diodes, Schottky barrier diodes, field-effect transistors, etc., operating under strongly inhomogeneous distributions of the electric field and charge concentration

Extension of the impedance field method to the noise analysis of a semiconductor junction: Analytical approach

We present an analytical procedure to perform the local noise analysis of a semiconductor junction when both the drift and diffusive parts of the current are important. The method takes into account space-inhomogeneous and hot-carriers conditions in the framework of the drift-diffusion model, and it can be effectively applied to the local noise analysis of different devices: n+nn+ diodes, Schottky barrier diodes, field-effect transistors, etc., operating under strongly inhomogeneous distributions of the electric field and charge concentration

Theory of surface noise under Coulomb correlations between carriers and surface states

We present a theory of the surface noise in a nonhomogeneous conductive channel adjacent to an insulating layer. The theory is based on the Langevin approach which accounts for the microscopic sources of fluctuations originated from trapping¿detrapping processes at the interface and intrachannel electron scattering. The general formulas for the fluctuations of the electron concentration, electric field as well as the current-noise spectral density have been derived. We show that due to the self-consistent electrostatic interaction, the current noise originating from different regions of the conductive channel appears to be spatially correlated on the length scale correspondent to the Debye screening length in the channel. The expression for the Hooge parameter for 1/f noise, modified by the presence of Coulomb interactions, has been derived

Active du/dt Filtering for Variable-Speed AC Drives

An oscillating overvoltage has become a common phenomenon at the motor terminal in inverter-fed variable-speed drives. The problem has emerged since modern insulated gate bipolar transistors have become the standard choice as the power switch component in lowvoltage frequency converter drives. Theovervoltage phenomenon is a consequence of the pulse shape of inverter output voltage and impedance mismatches between the inverter, motor cable, and motor. The overvoltages are harmful to the electric motor, and may cause, for instance, insulation failure in the motor. Several methods have been developed to mitigate the problem. However, most of them are based on filtering with lossy passive components, the drawbacks of which are typically their cost and size. In this doctoral dissertation, application of a new active du/dt filtering method based on a low-loss LC circuit and active control to eliminate the motor overvoltages is discussed. The main benefits of the method are the controllability of the output voltage du/dt within certain limits, considerably smaller inductances in the filter circuit resulting in a smaller physical component size, and excellent filtering performance when compared with typical traditional du/dt filtering solutions. Moreover, no additional components are required, since the active control of the filter circuit takes place in the process of the upper-level PWM modulation using the same power switches as the inverter output stage. Further, the active du/dt method will benefit from the development of semiconductor power switch modules, as new technologies and materials emerge, because the method requires additional switching in the output stage of the inverter and generation of narrow voltage pulses. Since additional switching is required in the output stage, additional losses are generated in the inverter as a result of the application of the method. Considerations on the application of the active du/dt filtering method in electric drives are presented together with experimental data in order to verify the potential of the method.

Tasajännitetason nosto polttokennosovelluksessa

Polttokennojen, erityisesti SOFC-kennojen, tutkimuksessa on viime vuosina saavutettu merkittäviä edistysaskelia ja mahdollisuudet kennojen laajamittaiseen hyödyntämiseen paranevat koko ajan. Polttokennojen yleistyessä tarvitaan tehoelektroniikkaa muokkaamaan kennojen tasajännite verkkoon sopivaksi vaihtojännitteeksi. Verkkovaihtosuuntaaja vaatii korkeamman jännitetason, kuin polttokennosta on saatavissa, joten tasajännitetasoa on ensin nostettava. Tässä diplomityössä esitellään kolme eri hakkuritopologiaa ja perehdytään kokosiltahakkurin optimointiin. Hakkurin pääasialliset häviölähteet olivat toision diodisilta ja transistorit. Diodien vaihtaminen piidiodeista piikarbididiodeihin ei parantanut hyötysuhdetta, koska toision jännite tarkastellussa sovelluksessa oli matala. Muuntajan käämiminen litz-johtimella paransi hyötysuhdetta merkittävästi.

Field-Programmable Gate Array Card for Readout and Control of Cryoelectronics

The main goal of the present Master’s Thesis project was to create a field-programmable gate array (FPGA) based system for the control of single-electron transistors or other cryoelectronic devices. The FPGA and similar technologies are studied in the present work. The fixed and programmable logic are compared with each other. The main features and limitations of the hardware used in the project are investigated. The hardware and software connections of the device to the computer are shown in detail. The software development techniques for FPGA-based design are described. The steps of design for programmable logic are considered. Furthermore, the results of filters implemented in the software are illustrated.

Active inverter output filtering methods

Frequency converters are widely used in the industry to enable better controllability and efficiency of variable speed AC motor drives. Despite these advantages, certain challenges concerning the inverter and motor interfacing have been present for decades. As insulated gate bipolar transistors entered the market, the inverter output voltage transition rate significantly increased compared with their predecessors. Inverters operate based on pulse width modulation of the output voltage, and the steep voltage edge fed by the inverter produces a motor terminal overvoltage. The overvoltage causes extra stress to the motor insulation, which may lead to a prematuremotor failure. The overvoltage is not generated by the inverter alone, but also by the sum effect of the motor cable length and the impedance mismatch between the cable and the motor. Many solutions have been shown to limit the overvoltage, and the mainstream products focus on passive filters. This doctoral thesis studies an alternative methodology for motor overvoltage reduction. The focus is on minimization of the passive filter dimensions, physical and electrical, or better yet, on operation without any filter. This is achieved by additional inverter control and modulation. The studied methods are implemented on different inverter topologies, varying in nominal voltage and current.For two-level inverters, the studied method is termed active du/dt. It consists of a small output LC filter, which is controlled by an independent modulator. The overvoltage is limited by a reduced voltage transition rate. For multilevel inverters, an overvoltage mitigation method operating without a passive filter, called edge modulation, is implemented. The method uses the capability of the inverter to produce two switching operations in the same direction to cancel the oscillating voltages of opposite phases. For parallel inverters, two methods are studied. They are both intended for two-level inverters, but the first uses individual motor cables from each inverter while the other topology applies output inductors. The overvoltage is reduced by interleaving the switching operations to produce a similar oscillation accumulation as with the edge modulation. The implementation of these methods is discussed in detail, and the necessary modifications to the control system of the inverter are presented. Each method is experimentally verified by operating industrial frequency converters with the modified control. All the methods are found feasible, and they provide sufficient overvoltage protection. The limitations and challenges brought about by the methods are discussed.

Thermal Stress in a Roll-to-Roll Printed Electronics Substrate

The Roll-to-Roll process makes it possible to print electronic products continuously onto a uniform substrate. Printing components on flexible surfaces can bring down the costs of simple electronic devices such as RFID tags, antennas and transistors. The possibility of quickly printing flexible electronic components opens up a wide array of novel products previously too expensive to produce on a large scale. Several different printing methods can be used in Roll-to-Roll printing, such as gravure, spray, offset, flexographic and others. Most of the methods can also be mixed in one production line. Most of them still require years of research to reach a significant commercial level. The research for this thesis was carried out at the Konkuk University Flexible Display Research Center (KU-FDRC) in Seoul, Korea. A system using Roll-to-Roll printing requires that the motion of the web can be controlled in every direction in order to align different layers of ink properly. Between printers the ink is dried with hot air. The effects of thermal expansion on the tension of the web are studied in this work, and a mathematical model was constructed on Matlab and Simulink. Simulations and experiments lead to the conclusion that the thermal expansion of the web has a great influence on the tension of the web. Also, experimental evidence was gained that the particular printing machine used for these experiments at KU-FDRC may have a problem in controlling the speeds of the cylinders which pull the web.

Power cycling lifetime estimation of IGBT power modules based on chip temperature modeling

In this doctoral thesis, methods to estimate the expected power cycling life of power semiconductor modules based on chip temperature modeling are developed. Frequency converters operate under dynamic loads in most electric drives. The varying loads cause thermal expansion and contraction, which stresses the internal boundaries between the material layers in the power module. Eventually, the stress wears out the semiconductor modules. The wear-out cannot be detected by traditional temperature or current measurements inside the frequency converter. Therefore, it is important to develop a method to predict the end of the converter lifetime. The thesis concentrates on power-cycling-related failures of insulated gate bipolar transistors. Two types of power modules are discussed: a direct bonded copper (DBC) sandwich structure with and without a baseplate. Most common failure mechanisms are reviewed, and methods to improve the power cycling lifetime of the power modules are presented. Power cycling curves are determined for a module with a lead-free solder by accelerated power cycling tests. A lifetime model is selected and the parameters are updated based on the power cycling test results. According to the measurements, the factor of improvement in the power cycling lifetime of modern IGBT power modules is greater than 10 during the last decade. Also, it is noticed that a 10 C increase in the chip temperature cycle amplitude decreases the lifetime by 40%. A thermal model for the chip temperature estimation is developed. The model is based on power loss estimation of the chip from the output current of the frequency converter. The model is verified with a purpose-built test equipment, which allows simultaneous measurement and simulation of the chip temperature with an arbitrary load waveform. The measurement system is shown to be convenient for studying the thermal behavior of the chip. It is found that the thermal model has a 5 C accuracy in the temperature estimation. The temperature cycles that the power semiconductor chip has experienced are counted by the rainflow algorithm. The counted cycles are compared with the experimentally verified power cycling curves to estimate the life consumption based on the mission profile of the drive. The methods are validated by the lifetime estimation of a power module in a direct-driven wind turbine. The estimated lifetime of the IGBT power module in a direct-driven wind turbine is 15 000 years, if the turbine is located in south-eastern Finland.