Structures spatiales dans la pensée religieuse grecque de l'époque archaïque : la représentation de quelques espaces insondables: l'éther, l'air, l'abîme marin

Cette thèse se propose d’étudier les façons dont la pensée et l’imaginaire grec de l’époque archaïque se représentaient quelques pans du réel qui ne se laissaient jamais voir ni atteindre: l’éther, l’air et l’abîme marin. Vu le caractère insondable de ces espaces, l’imagination et l’abstraction se sont ingéniées à les appréhender par un discours spécifique et à les intégrer dans le système de connaissances et de croyances propre à l’époque en leur assignant une place dans le système de l’univers, en les rattachant à une hiérarchie de l’ordre cosmologique, en leur donnant une forme, en classant leurs objets et en les rapportant aux modèles du monde connu, en les aménageant par les moyens les plus divers. Une étude des formes d’expression de la pensée grecque archaïque, autant littéraires qu’iconographiques, permet de cerner les diverses formes de représentation des domaines inaccessibles et les modèles d’organisation spatiale issus de ce type de pensée. Grâce à la dialectique particulière qui ressort du rapport entre espace et mouvement, cette thèse se propose également d’interroger le corpus des sources grecques archaïques sous des angles jusqu’ici peu explorés: comment maîtrise-t-on l’espace par les déplacements physiques en dehors des parcours terrestres? Comment les schémas du mouvement dans l’espace se sont-ils forgés? Comment les dichotomies issues de la logique spatiale archaïque (haut/bas, droite/gauche, est/ouest, en deça/au-delà, etc.) influent-elles sur la structuration spatiale? Quelles espèces d’espace révèlent les déplacements à travers les différents niveaux du monde, que ce soit ceux des dieux, ceux des mortels et d’autres entités, forces physiques et substances privilégiées dans le commerce avec le divin et le monde d’en haut? Ces analyses mettent en valeur les façons dont l’imagination et l’abstraction plutôt que l’expérience vécue ont contribué, à leur façon, à structurer l’espace et à forger l’image du monde comme κόσμος, monde mis en ordre et soumis autant aux lois physiques qu’aux lois divines.

Bounding of switching activity in logic circuits

Thèse diffusée initialement dans le cadre d'un projet pilote des Presses de l'Université de Montréal/Centre d'édition numérique UdeM (1997-2008) avec l'autorisation de l'auteur.

Realization of Optical Logic Gates Using the Thermal Lens Effect

A sensitive method based on the principle of photothermal phenomena to realize optical logic gates is presented. A dual beam thermal lens method using low power cw lasers in a dye-doped polymer can be very effectively used as an alternate technique to perform the logical function such as NAND, AND and OR.

A new look at reversible logic implementation of decimal adder

Reversibility plays a fundamental role when logic gates such as AND, OR, and XOR are not reversible. computations with minimal energy dissipation are considered. Hence, these gates dissipate heat and may reduce the life of In recent years, reversible logic has emerged as one of the most the circuit. So, reversible logic is in demand in power aware important approaches for power optimization with its circuits. application in low power CMOS, quantum computing and A reversible conventional BCD adder was proposed in using conventional reversible gates.

Performance analysis of double digit decimal multiplier on various FPGA logic families

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that performs 2 digit multiplications simultaneously in one clock cycle. This design offers low latency and high throughput. When multiplying two n-digit operands to produce a 2n-digit product, the design has a latency of (n / 2) 1 cycles. The paper presents area and delay comparisons for 7-digit, 16-digit, 34-digit double digit decimal multipliers on different families of Xilinx, Altera, Actel and Quick Logic FPGAs. The multipliers presented can be extended to support decimal floating-point multiplication for IEEE P754 standard

Quick Addition of Decimals Using Reversible Conservative Logic

In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, nanotechnology and quantum computing. This research proposes quick addition of decimals (QAD) suitable for multi-digit BCD addition, using reversible conservative logic. The design makes use of reversible fault tolerant Fredkin gates only. The implementation strategy is to reduce the number of levels of delay there by increasing the speed, which is the most important factor for high speed circuits.

Automated synthesis of delay-reduced Reed-Muller universal logic module networks

This paper presents a new approach to implement Reed-Muller Universal Logic Module (RM-ULM) networks with reduced delay and hardware for synthesizing logic functions given in Reed-Muller (RM) form. Replication of single control line RM-ULM is used as the only design unit for defining any logic function. An algorithm is proposed that does exhaustive branching to reduce the number of levels and modules required to implement any logic function in RM form. This approach attains a reduction in delay, and power over other implementations of functions having large number of variables.

Comparative effectiveness of solar disinfection using small-scale batch reactors with reflective, absorptive and transmissive rear surfaces

This study investigated the enhancement of solar disinfection using custom-made batch reactors with reflective (foil-backed) or absorptive (black-backed) rear surfaces, under a range of weather conditions in India. Plate counts of Escherichia coli ATCC11775 were made under aerobic conditions and under conditions where reactive oxygen species (ROS) were neutralised, i.e. in growth medium supplemented with 0.05% w/v sodium pyruvate plus incubation under anaerobic conditions. While the addition of either an absorptive or a reflective backing enhanced reactor performance under strong sunlight, the reflective reactor was the only system to show consistent enhancement under low sunlight, where the process was slowest. Counts performed under ROS-neutralised conditions were slightly higher than those in air, indicating that a fraction of the cells become sub-lethally injured during exposure to sunlight to the extent that they were unable to grow aerobically. However, the influence of this phenomenon on the dynamics of inactivation was relatively small

A contextual-logic extension of TOSCANA

The aim of this paper is to indicate how TOSCANA may be extended to allow graphical representations not only of concept lattices but also of concept graphs in the sense of Contextual Logic. The contextual-logic extension of TOSCANA requires the logical scaling of conceptual and relatioal scales for which we propose the Peircean Algebraic Logic as reconstructed by R. W. Burch. As graphical representations we recommend, besides labelled line diagrams of concept lattices and Sowa's diagrams of conceptual graphs, particular information maps for utilizing background knowledge as much as possible. Our considerations are illustrated by a small information system about the domestic flights in Austria.

Asymptotically Zero Energy Computing Using Split-Level Charge Recovery Logic

The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers. In this work we present a number of new CMOS logic families, Charge Recovery Logic (CRL) as well as the much improved Split-Level Charge Recovery Logic (SCRL), within which the transfer of charge between the nodes occurs quasistatically. Operating quasistatically, these logic families have an energy dissipation that drops linearly with operating frequency, i.e., their power consumption drops quadratically with operating frequency as opposed to the linear drop of conventional CMOS. The circuit techniques in these new families rely on constructing an explicitly reversible pipelined logic gate, where the information necessary to recover the energy used to compute a value is provided by computing its logical inverse. Information necessary to uncompute the inverse is available from the subsequent inverse logic stage. We demonstrate the low energy operation of SCRL by presenting the results from the testing of the first fully quasistatic 8 x 8 multiplier chip (SCRL-1) employing SCRL circuit techniques.

Reasoning about Temporal Context using Ontology and Abductive Constraint Logic Programming

The underlying assumptions for interpreting the meaning of data often change over time, which further complicates the problem of semantic heterogeneities among autonomous data sources. As an extension to the COntext INterchange (COIN) framework, this paper introduces the notion of temporal context as a formalization of the problem. We represent temporal context as a multi-valued method in F-Logic; however, only one value is valid at any point in time, the determination of which is constrained by temporal relations. This representation is then mapped to an abductive constraint logic programming framework with temporal relations being treated as constraints. A mediation engine that implements the framework automatically detects and reconciles semantic differences at different times. We articulate that this extended COIN framework is suitable for reasoning on the Semantic Web.

Reasoning about Temporal Context using Ontology and Abductive Constraint Logic Programming

The underlying assumptions for interpreting the meaning of data often change over time, which further complicates the problem of semantic heterogeneities among autonomous data sources. As an extension to the COntext INterchange (COIN) framework, this paper introduces the notion of temporal context as a formalization of the problem. We represent temporal context as a multi-valued method in F-Logic; however, only one value is valid at any point in time, the determination of which is constrained by temporal relations. This representation is then mapped to an abductive constraint logic programming framework with temporal relations being treated as constraints. A mediation engine that implements the framework automatically detects and reconciles semantic differences at different times. We articulate that this extended COIN framework is suitable for reasoning on the Semantic Web.

Reasoning about Temporal Context using Ontology and Abductive Constraint Logic Programming

The underlying assumptions for interpreting the meaning of data often change over time, which further complicates the problem of semantic heterogeneities among autonomous data sources. As an extension to the COntext INterchange (COIN) framework, this paper introduces the notion of temporal context as a formalization of the problem. We represent temporal context as a multi-valued method in F-Logic; however, only one value is valid at any point in time, the determination of which is constrained by temporal relations. This representation is then mapped to an abductive constraint logic programming framework with temporal relations being treated as constraints. A mediation engine that implements the framework automatically detects and reconciles semantic differences at different times. We articulate that this extended COIN framework is suitable for reasoning on the Semantic Web.

Reasoning about Temporal Context using Ontology and Abductive Constraint Logic Programming

The underlying assumptions for interpreting the meaning of data often change over time, which further complicates the problem of semantic heterogeneities among autonomous data sources. As an extension to the COntext INterchange (COIN) framework, this paper introduces the notion of temporal context as a formalization of the problem. We represent temporal context as a multi-valued method in F-Logic; however, only one value is valid at any point in time, the determination of which is constrained by temporal relations. This representation is then mapped to an abductive constraint logic programming framework with temporal relations being treated as constraints. A mediation engine that implements the framework automatically detects and reconciles semantic differences at different times. We articulate that this extended COIN framework is suitable for reasoning on the Semantic Web.