Field-effect transistors based on Zinc oxide nanoparticles

This work reports the development of field-effect transistors (FETs), whose channel is based on zinc oxide (ZnO) nanoparticles (NPs). Using screen-printing as the primary deposition technique, different inks were developed, where the semiconducting ink is based on a ZnO NPs dispersion in ethyl cellulose (EC). These inks were used to print electrolyte-gated transistors (EGTs) in a staggered-top gate structure on glass substrates, using a lithium-based polymeric electrolyte. In another approach, FETs with a staggered-bottom gate structure on paper were developed using a sol-gel method to functionalize the paper’s surface with ZnO NPs, using zinc acetate dihydrate (ZnC4H6O4·2H2O) and sodium hydroxide (NaOH) as precursors. In this case, the paper itself was used as dielectric. The various layers of the two devices were characterized using X-ray diffraction (XRD), scanning electron microscopy (SEM), Fourier Transform Infrared spectroscopy (FTIR), thermogravimetric and differential scanning calorimetric analyses (TG-DSC). Electrochemical impedance spectroscopy (EIS) was used in order to evaluate the electric double-layer (EDL) formation, in the case of the EGTs. The ZnO NPs EGTs present electrical modulation for annealing temperatures equal or superior to 300 ºC and in terms of electrical properties they showed On/Off ratios in the order of 103, saturation mobilities (μSat) of 1.49x10-1 cm2(Vs)-1 and transconductance (gm) of 10-5 S. On the other hand, the ZnO NPs FETs on paper exhibited On/Off ratios in the order of 102, μSat of 4.83x10- 3 cm2(Vs)-1and gm around 10-8 S.

Implementação de sistemas de encriptação AES advanced encryption standard em hardware para segurança

Dissertação de mestrado integrado em Engenharia Electrónica Industrial e Computadores

Errores en sistemas de procesamiento de datos debido a eventos transitorios en interfaces analógicas: aportes a la mitigación de los mismos. Errors in data processing systems due to single transient events affecting analog interfaces: contributions to their mitigation.

Los eventos transitorios únicos analógicos (ASET, Analog Single Event Transient) se producen debido a la interacción de un ión pesado o un protón de alta energía con un dispositivo sensible de un circuito analógico. La interacción del ión con un transistor bipolar o de efecto de campo MOS induce pares electrón-hueco que provocan picos que pueden propagarse a la salida del componente analógico provocando transitorios que pueden inducir fallas en el nivel sistema. Los problemas más graves debido a este tipo de fenómeno se dan en el medioambiente espacial, muy rico en iones pesados. Casos típicos los constituyen las computadoras de a bordo de satélites y otros artefactos espaciales. Sin embargo, y debido a la continua contracción de dimensiones de los transistores (que trae aparejado un aumento de sensibilidad), este fenómeno ha comenzado a observarse a nivel del mar, provocado fundamentalmente por el impacto de neutrones atmosféricos. Estos efectos pueden provocar severos problemas a los sistemas informáticos con interfaces analógicas desde las que obtienen datos para el procesamiento y se han convertido en uno de los problemas más graves a los que tienen que hacer frente los diseñadores de sistemas de alta escala de integración. Casos típicos son los Sistemas en Chip que incluyen módulos de procesamiento de altas prestaciones como las interfaces analógicas.El proyecto persigue como objetivo general estudiar la susceptibilidad de sistemas informáticos a ASETs en sus secciones analógicas, proponiendo estrategias para la mitigación de los errores.Como objetivos específicos se pretende: -Proponer nuevos modelos de ASETs basados en simulaciones en el nivel dispositivo y resueltas por el método de elementos finitos.-Utilizar los modelos para identificar las secciones más propensas a producir errores y consecuentemente para ser candidatos a la aplicación de técnicas de endurecimiento a radiaciones.-Utilizar estos modelos para estudiar la naturaleza de los errores producidos en sistemas de procesamiento de datos.-Proponer soluciones novedosas para la mitigación de estos efectos en los mismos circuitos analógicos evitando su propagación a las secciones digitales.-Proponer soluciones para la mitigación de los efectos en el nivel sistema.Para llevar a cabo el proyecto se plantea un procedimiento ascendente para las investigaciones a realizar, comenzando por descripciones en el nivel físico para posteriormente aumentar el nivel de abstracción en el que se encuentra modelado el circuito. Se propone el modelado físico de los dispositivos MOS y su resolución mediante el Método de Elementos Finitos. La inyección de cargas en las zonas sensibles de los modelos permitirá determinar los perfiles de los pulsos de corriente que deben inyectarse en el nivel circuito para emular estos efectos. Estos procedimientos se realizarán para los distintos bloques constructivos de las interfaces analógicas, proponiendo estrategias de mitigación de errores en diferentes niveles.Los resultados esperados del presente proyecto incluyen hardware para detección de errores y tolerancia a este tipo de eventos que permitan aumentar la confiabilidad de sistemas de tratamiento de la información, así como también nuevos datos referentes a efectos de la radiación en semiconductores, nuevos modelos de fallas transitorias que permitan una simulación de estos eventos en el nivel circuito y la determinación de zonas sensibles de interfaces analógicas típicas que deben ser endurecidas para radiación.

Métodos de extracción de parámetros de un circuito equivalente de pequeña señal para transistores LDMOS de potencia para aplicaciones de RF

En la actualidad, la gran cantidad de aplicaciones que surgen dentro del ámbito de la radiofrecuencia hacen que el desarrollo de dispositivos dentro de este campo sea constante. Estos dispositivos cada vez requieren mayor potencia para frecuencias de trabajo elevadas, lo que sugiere abrir vías de investigación sobre dispositivos de potencia que ofrezcan los resultados deseados para altas frecuencias de operación (GHz). Dentro de este ámbito, el objetivo principal de este proyecto es el de realizar un estudio sobre este tipo de dispositivos, siendo el transistor LDMOS el candidato elegido para tal efecto, debido a su buen comportamiento en frecuencia para tensiones elevadas de funcionamiento.

Direct modulation of electroluminescence from silicon nanocrystals beyond radiative recombination rates

We propose a light emitting transistor based on silicon nanocrystals provided with 200 Mbits/ s built-in modulation. Suppression of electroluminescence from silicon nanocrystals embedded into the gate oxide of a field effect transistor is achieved by fast Auger quenching. In this process, a modulating drain signal causes heating of carriers in the channel and facilitates the charge injection into the nanocrystals. This excess of charge enables fast nonradiative processes that are used to obtain 100% modulation depths at modulating voltages of 1 V.

A time-domain method for the analysis of thermal impedance response preserving the convolution form

The study of the thermal behavior of complex packages as multichip modules (MCM¿s) is usually carried out by measuring the so-called thermal impedance response, that is: the transient temperature after a power step. From the analysis of this signal, the thermal frequency response can be estimated, and consequently, compact thermal models may be extracted. We present a method to obtain an estimate of the time constant distribution underlying the observed transient. The method is based on an iterative deconvolution that produces an approximation to the time constant spectrum while preserving a convenient convolution form. This method is applied to the obtained thermal response of a microstructure as analyzed by finite element method as well as to the measured thermal response of a transistor array integrated circuit (IC) in a SMD package.

Design and construction of precision heat fluxmeters

InAlAs/InGaAs/InP based high electron mobility transistor devices have been structurally and electrically characterized, using transmission electron microscopy and Raman spectroscopy and measuring Hall mobilities. The InGaAs lattice matched channels, with an In molar fraction of 53%, grown at temperatures lower than 530¿°C exhibit alloy decomposition driving an anisotropic InGaAs surface roughness oriented along [1math0]. Conversely, lattice mismatched channels with an In molar fraction of 75% do not present this lateral decomposition but a strain induced roughness, with higher strength as the channel growth temperature increases beyond 490¿°C. In both cases the presence of the roughness implies low and anisotropic Hall mobilities of the two dimensional electron gas.

Modeling and manufacturability assessment of bistable quantum-dot cells

We have investigated the behavior of bistable cells made up of four quantum dots and occupied by two electrons, in the presence of realistic confinement potentials produced by depletion gates on top of a GaAs/AlGaAs heterostructure. Such a cell represents the basic building block for logic architectures based on the concept of quantum cellular automata (QCA) and of ground state computation, which have been proposed as an alternative to traditional transistor-based logic circuits. We have focused on the robustness of the operation of such cells with respect to asymmetries derived from fabrication tolerances. We have developed a two-dimensional model for the calculation of the electron density in a driven cell in response to the polarization state of a driver cell. Our method is based on the one-shot configuration-interaction technique, adapted from molecular chemistry. From the results of our simulations, we conclude that an implementation of QCA logic based on simple ¿hole arrays¿ is not feasible, because of the extreme sensitivity to fabrication tolerances. As an alternative, we propose cells defined by multiple gates, where geometrical asymmetries can be compensated for by adjusting the bias voltages. Even though not immediately applicable to the implementation of logic gates and not suitable for large scale integration, the proposed cell layout should allow an experimental demonstration of a chain of QCA cells.

Electronic properties of a quantum wire with arbitrary bending angle

The electron transmission and bound state properties of a quantum wire with a sharp bend at arbitrary angle are studied, extending results on the right angle sharp bend (the L¿shaped wire). These new results are compared to those of a similar structure, the circular bend wire. The possibility of using a bent wire to perform transistor action is also discussed.

Theory of surface noise under Coulomb correlations between carriers and surface states

We present a theory of the surface noise in a nonhomogeneous conductive channel adjacent to an insulating layer. The theory is based on the Langevin approach which accounts for the microscopic sources of fluctuations originated from trapping¿detrapping processes at the interface and intrachannel electron scattering. The general formulas for the fluctuations of the electron concentration, electric field as well as the current-noise spectral density have been derived. We show that due to the self-consistent electrostatic interaction, the current noise originating from different regions of the conductive channel appears to be spatially correlated on the length scale correspondent to the Debye screening length in the channel. The expression for the Hooge parameter for 1/f noise, modified by the presence of Coulomb interactions, has been derived

Registrador portátil de odorantes basado en la modulación de temperatura de un sensor mos comercial

A simple, portable and low-cost system for odor detection was developed using a single MOS commercial sensor and a microcontroller. The temperature modulation technique was implemented applying a DC signal pulse to the sensor heater by a bipolar transistor. Two odorant profiles, ethanol and acetic acid vapors, were obtained and distinguished based on their amplitude versus time responses. Response for acetic acid was not reported by the sensor manufacturer. An ethanol vapor calibration curve was also obtained. Experimental data showed a potential behavior according to the theoretical equation of the MOS sensors. Values of logK=0.457 and α=-0.213 for a 95% confidence level were obtained.

Influência de diferentes solventes utilizados na deposição de filme de poli(9-vinilcarbazol) em dispositivos OLEDs

This work studies the influence of the film deposition process on light emission performance and on threshold voltage of OLEDs, with architecture glass/ITO/PEDOT:PSS/PVK/Alq3/Al. The commercial PVK was dissolved in different solvents such as: chloroform, tetrahydrofuran, 1,2,4-trichlorobenzene and trimethylpentane. OLEDs were characterized by current-voltage and revealed a significant influence of the solvents, although all devices emitted green electroluminescence. A difference in threshold voltage up to 10 V was observed among OLEDs prepared from different solvents. The 1,2,4-trichlorobenzene showed best performance, presenting lowest treshold voltage (≈ 6 V), followed by tetrahydrofuran (≈ 8 V), trimethylpentane (≈ 14 V) and chloroform (≈ 16 V).

IGB-transistorien rinnankytkentä

Tässä kandidaatintyössä tutkitaan IGB-transistorien rinnankytkentää ja siinä usein esiintyvää virran epäsymmetristä jakaantumista. Työssä esitellään yleisempien IGB-transistorien rakenteet ja tarkastellaan niiden tärkeimpiä ominaisuuksia. IGBT:n parametrien sekä ulkoisen piirin vaikutusta virran jakaantumiseen selvitetään. Vaikuttavien tekijöiden pohjalta pyritään esittämään tarvittavat toimenpiteet sekä mittaustavat, joilla virran jakaantumista voidaan tasoittaa ja saada toteutettua luotettava IGB-transistorien rinnankytkentä.

IGBT-simulaatiomallien soveltuvuus laitetason hyötysuhdesimulaatioihin

Tehoelektroniikkalaitteiden tehon kasvun myötä niiden hyötysuhteesta on tullut yksi niiden tärkeimmistä ominaisuuksista. Suurilla tehoilla prosentuaalisesti pienetkin tehohäviöt ovat merkittäviä ja aiheuttavat laitteen käyttäjälle ylimääräisiä energiakustannuksia ja tarvetta hukkalämmön poistolle. Näistä syistä asiakkaat vaativat hyvällä hyötysuhteella toimivia laitteita, joten laitevalmistajat pyrkivät tekemään niistä sellaisia. Simulaatiomallit ovat arvokkaita työkaluja laitesuunnittelussa. Hyötysuhdeoptimoinnin kannalta tehohäviöt tulisi pystyä mallintamaan, jotta komponenttivalintojen, ohjaustapojen ja pääpiiritopologioiden vaikutusta hyötysuhteeseen voitaisiin arvioida. Tässä työssä perehdytään eristehilabipolaaritransistorista (IGBT) tehtyihin simulaatiomalleihin ja arvioidaan niiden soveltuvuutta IGBT:ssä syntyvien tehohäviöiden mallintamiseen. Lisäksi verrataan mallia mittaukseen ja pohditaan, millaiset vaatimukset simulaatiomalliin todellisuudessa kohdistuvat.