On designing OTA-C graphic-equalizers with MOSFET-triode transconductors

A CMOS audio-equalizer based on a parallel-array of 2nd-order bandpass-sections is presented and realized with triode transconductors. It has a programmable 12db-boost/cut on each of its three decade-bands, easily achieved through the linear dependence of gm on VDS. In accordance with a 0.8μm n-well double-metal fabrication process, a range of simulations supports theoretical analysis and circuit performance at different boost/cut scenarios. For VDD=3.3V, fullboosting stand-by prover consumption is 1.05mW. THD=-42.61dB@1Vpp and may be improved by balanced structures. Thermal- and I/f-noise spectral densities are 3.2μV/Hz12 and 18.2μV/Hz12@20Hz, respectively, for a dynamic range of 52.3dB@1Vpp. The equalizer effective area is 2.4mm2. The drawback of the existing transmission-zero due to the feedthrough-capacitance of a triode input-device is also addressed. The proposed topology can be extended to the design of more complex graphic-equalizers and hearing-aids.

A low-voltage triode-MOSFET four-quadrant multiplier with optimized current-efficiency

A low-voltage, low-power four-quadrant analog multiplier with optimized current-efficiency is presented. Its core corresponds to a pseudodifferential cascode, gain-boosting triode-transconductor. According to a low-voltage 1.2μm CMOS n-well process, operand differential-amplitudes are 1.0Vpp and 0.32Vpp for a 1.3V-supply. Common-mode voltages are properly chosen to maximize current-efficiency to 58%. Total quiescent dissipation is 260μW. A range of PSPICE simulation supports theoretical analysis. Excellent linearity is observed on dc characteristic. Assuming a ±0.5% mismatch on (W/L) and VTH THD at full-scale is 0.93% and 1.42%, for output frequencies of 1MHz and 10MHz, respectively.

On optimizing micropower MOS regulated cascode circuits on switched current techniques

Trade-off between settling time and micropower consumption in MOS regulated cascode current sources as building parts in high-accuracy, current-switching D/A converters is analyzed. The regulation-loop frequency characteristic is obtained and difficulties to impose a dominant-pole condition to the resulting 2nd-order system are discussed. Raising pole frequencies while meeting consumption requirements is basically limited by parasitic capacitances. An alternative is found by imposing a twin-pole system in which design constraints are somewhat relaxed and settling slightly faster. Relationships between pole frequencies, transistor geometry and bias are established. Simulated waveforms obtained with PSpice of designed circuits following a voltage perturbation suggest a good agreement with theory. The proposed approach applied to the design of a micropower current-mode D/A converter improves its simulated settling performance.

A linearly-tunable OTA-C sinusoidal oscillator for low-voltage applications

A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.

An active leakage-injection scheme applied to low-voltage SRAMs

An active leakage-injection scheme (ALIS) for low-voltage (LV) high-density (HD) SRAMs is presented. By means of a feedback loop comprising a servo-amplifier and a common-drain MOSFET, a current matching the respective bit-line leakage is injected onto the line during precharge and sensing, preventing the respective capacitances from erroneous discharges. The technique is able to handle leakages up to hundreds of μA at high operating temperatures. Since no additional timing is required, read-out operations are performed at no speed penalty. A simplified 256×1bit array was designed in accordance with a 0.35 CMOS process and 1.2V-supply. A range of PSPICE simulation attests the efficacy of ALIS. With an extra power consumption of 242 μW, a 200 μA-leakage @125°C, corresponding to 13.6 times the cell current, is compensated.

A low-voltage low-sensitivity sinusoidal VCO for DPLL realizations

A quasi-sinusoidal linearly tunable OTA-C VCO built with triode-region transconductors is presented. Oscillation upon power-on is ensured by RHP poles associated with gate-drain capacitances of OTA input devices. Since the OTA nonlinearity stabilizes the amplitude, the oscillation frequency f0 is first-order independent of VDD, making the VCO adequate to mixed-mode designs. A range of simulations attests the theoretical analysis. As part of a DPLL, the VCO was prototyped on a 0.8μm CMOS process, occupying an area of 0.15mm2. Nominal f0 is 1MHz, with K VCo=8.4KHz/mV. Measured sensitivity to VDD is below 2.17, while phase noise is -86dBc at 100-KHz offset. The feasibility of the VCO for higher frequencies is verified by a redesign based on a 0.35μm CMOS process and VDD=3.3V, with a linear frequency-span of l3.2MHz - 61.5MHz.

Photodetection with gate-controlled lateral BJTs from standard CMOS technology

The silicon-based gate-controlled lateral bipolar junction transistor (BJT) is a controllable four-terminal photodetector with very high responsivity at low-light intensities. It is a hybrid device composed of a MOSFET, a lateral BJT, and a vertical BJT. Using sufficient gate bias to operate the MOS transistor in inversion mode, the photodetector allows for increasing the photocurrent gain by 106 at low light intensities when the base-emitter voltage is smaller than 0.4 V, and BJT is off. Two operation modes, with constant voltage bias between gate and emitter/source terminals and between gate and base/body terminals, allow for tuning the photoresponse from sublinear to slightly above linear, satisfying the application requirements for wide dynamic range, high-contrast, or linear imaging. MOSFETs from a standard 0.18-μm triple-well complementary-metal oxide semiconductor technology with a width to length ratio of 8 μm /2 μm and a total area of ∼ 500μm2 are used. When using this area, the responsivities are 16-20 kA/W. © 2001-2012 IEEE.

An analog implementation of radial basis function network appropriate for transducer linearizer

A circuit for transducer linearizer tasks have been designed and built using discrete components and it implements by: a Radial Basis Function Network (RBFN) with three basis functions. The application in a linearized thermistor showed that the network has good approximation capabilities. The circuit advantages is the amplitude, width and center.

Electrical properties of polymer/metal interface in polymer light-emitting devices: electron injection barrier suppression

The electrical characterization of a high efficient multilayer polymer light emitting diode using poly[(2-methoxy-5-hexyloxy)-p-phenylenevinylene] as the emissive layer and an anionic fluorinated surfactant as the electron transport layer was performed. For the sake of comparison, a conventional single layer device was fabricated. The density current vs. voltage measurements revealed that the conventional device has a higher threshold voltage and lower current compared to the surfactant modified device. The effective barrier height for electron injection was suppressed. The influence of the interfaces and bulk contributions to the dc and high frequencies conductivities of the devices was also discussed. (c) 2006 Springer Science + Business Media, Inc.

Effect of ion concentration of ionomer in electron injection layer of polymer light-emitting devices

Polymer light-emitting devices (PLEDs) with poly(2-methoxy-5-hexyloxy)-p-phenylenevinylene (OC1OC6-PPV) as the emissive layer were studied with an electron injection layer of ionomers consisting of copolymers of styrene and methylmethacrylate (PS/PMMA) with 3, 6 and 8 mol% degree of sulfonation. The ionomers were able to form very thin films over the emissive layer, with less than 30 nm. Additionally, the presence of ion pairs of ionomer suppresses the tendency toward dewetting of the thin film of ionomer (similar to 10 nm) which can cause malfunction of the device. The effect of the ionomers was investigated as a function of the ion content. The devices performance, characterized by their current density and luminance intensity versus voltage, showed a remarkable increase with the ionomer layer up to 6 mol% of ionic groups, decreasing after that for the 8 mol% ionomer device. The study of the impedance spectroscopy in the frequency range from 0.1 to 10(6) Hz showed that the injection phenomena dominate over the transport in the electroluminescent polymer bulk. (c) 2006 Elsevier B.V. All rights reserved.

Polymer light emitting devices with Langmuir-Blodgett (LB) films: Enhanced performance due to an electron-injecting layer of ionomers

Polymer light-emitting devices (PLEDs) have been produced with Langmuir-Blodgett (LB) films from poly(2-methoxy-5-hexyloxy)-p-phenylenevinylene (OC1OC6-PPV) as the emissive layer and an ionomer of a copolymer of styrene and methylmethacrylate (PS/PMMA) as an electron-injection layer. The main features of such devices are the low operating voltages, obtainable firstly due to the good quality of the ultrathin LB films that allows PLEDs to be produced reproducibly and secondly due to the improved electrical and luminance properties brought by the electron-injection layer. Also demonstrated is the superior performance of an all-LB device compared to another one produced with cast films of the same materials. Published by Elsevier B.V.

Electrical characterization of poly(amide-imide) for application in organic field effect devices

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Determining the interfacial density of states in metal-insulator-semiconductor devices based on poly(3-hexylthiophene)

Low frequency admittance measurements are used to determine the density of interface states in metal-insulator-semiconductor diodes based on the unintentionally doped, p-type semiconductor poly(3-hexylthiophene). After vacuum annealing at 90 degrees C, interface hole trapping states are shown to be distributed in energy with their density decreasing approximately linearly from similar to 20x10(10) to 5x10(10) cm(-2) eV(-1) over an energy range extending from 0.05 to 0.25 eV above the bulk Fermi level. (c) 2008 American Institute of Physics.

Magnetic field effects on the conductivity of organic bipolar and unipolar devices at room temperature

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)