18 resultados para Ultra-Low Power,

em Cochin University of Science


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Low power optical phase conjugation in polyvinyl alcohol films embedded with saturable dyes is reported. Phase conjugate reflectivity achieved is higher than that obtained in the case of similar gelatin films.

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Remote Data acquisition and analysing systems developed for fisheries and related environmental studies have been reported. It consists of three units. The first one namely multichannel remote data acquisition system is installed at the remote place powered by a rechargeable battery. It acquires and stores the 16 channel environmental data on a battery backed up RAM. The second unit called the Field data analyser is used for insitue display and analysis of the data stored in the backed up RAM. The third unit namely Laboratory data analyser is an IBM compatible PC based unit for detailed analysis and interpretation of the data after bringing the RAM unit to the laboratory. The data collected using the system has been analysed and presented in the form of a graph. The system timer operated at negligibly low current, switches on the power to the entire remote operated system at prefixed time interval of 2 hours.Data storage at remote site on low power battery backedupRAM and retrieval and analysis of data using PC are the special i ty of the system. The remote operated system takes about 7 seconds including the 5 second stabilization time to acquire and store data and is very ideal for remote operation on rechargeable bat tery. The system can store 16 channel data scanned at 2 hour interval for 10 days on 2K backed up RAM with memory expansion facility for 8K RAM.

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A sensitive method based on the principle of photothermal phenomena to realize optical logic gates is presented. A dual beam thermal lens method using low power cw lasers in a dye-doped polymer can be very effectively used as an alternate technique to perform the logical function such as NAND, AND and OR.

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We demonstrate the possibility of realizing, all-optical switching in gold nanosol. Two overlapping laser beams are used for this purpose, due to which a low-power beam passing collinear to a high-power beam will undergo cross phase modulation and thereby distort the spatial profile. This is taken to advantage for performing logic operations. We have also measured the threshold pump power to obtain a NOT gate and the minimum response time of the device. Contrary to the general notion that the response time of thermal effects used in this application is of the order of milliseconds, we prove that short pump pulses can result in fast switching. Different combinations of beam splitters and combiners will lead to the formation of other logic functions too.

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The primary aim of these investigations was to probe the elecnuchemical and material science aspects of some selected metal phthalocyanines(MPcs).Metal phthalocyanines are characterised by a unique planar molecular structure. As a single class of compounds they have been the subject of ever increasing number of physicochemical and technological investigations. During the last two decades the literature on these compounds was flooded by an outpour of original publications and patents. Almost every branch of materials science has benefited by their application-swface coating, printing, electrophotography, photoelectrochemistry, electronics and medicine to name a few.The present study was confined to the electrical and electrochemical properties of cobalt, nickel, zinc. iron and copper phthalocyanines. The use of soluble Pes as corrosion inhibitor for aluminium was also investigated.In the introductory section of the thesis, the work done so far on MPcs is reviewed. In this review emphasis is given to their general methods of synthesis and the physicochemical properties.In phthalocyanine chemistry one of the formidable tasks is the isolation of singular species. In the second chapter the methods of synthesis and purification are presented with necessary experimental details.The studies on plasma modified films of CoPe, FePc, ZnPc. NiPc and CuPc are also presented.Modification of electron transfer process by such films for reversible redox systems is taken as the criterion to establish enhanced electrocatalytic activity.Metal phthalocyanines are p- type semiconductors and the conductivity is enhanced by doping with iodine. The effect of doping on the activation energy of the conduction process is evaluated by measuring the temperature dependent variation of conductivity. Effect of thennal treatment on iodine doped CoPc is investigated by DSC,magnetic susceptibility, IR, ESR and electronic spectra. The elecnucatalytic activity of such doped materials was probed by cyclic voltammetry.The electron transfer mediation characteristics of MPc films depend on the film thickness. The influence of reducing the effective thickness of the MPc film by dispersing it into a conductive polymeric matrix was investigated. Tetrasulphonated cobalt phthalocyanine (CoTSP) was electrostatically immobilised into polyaniline and poly(o-toluidine) under varied conditions.The studies on corrosion inhibition of aluminium by CoTSP and CuTSP and By virtue of their anionic character they are soluble in water and are strongly adsorbed on aluminium. Hence they can act as corrosion inhibitors. CoTSP is also known to catalyze the reduction of dioxygen.This reaction can accelerate the anodic dissolution of metal as a complementary reaction. The influence of these conflicting properties of CoTSP on the corrosion of aluminium was studied and compared with those of CuTSP.In the course of these investigations a number of gadgets like cell for measuring the electrical conductivity of solids under non-isothermal conditions, low power rf oscillator and a rotating disc electrode were fabricated.

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The thesis focuses on efficient design methods and reconfiguration architectures suitable for higher performance wireless communication .The work presented in this thesis describes the development of compact,inexpensive and low power communication devices that are robust,testable and capable of handling multiple communication standards.A new multistandard Decimation Filter Design Toolbox is developed in MATLAB GUIDE environment.RNS based dual-mode decimation filters reconfigurable for WCDMA/WiMAX and WCDMA/WLANa standards are designed and implemented.It offers high speed operation with lesser area requirement and lower dynamic power dissipation.A novel sigma-delta based direct analog-to-residue converter that reduces the complexity of RNS conversion circuitry is presented.The performance of an OFDM communication system with a new RRNS-convolutional concatenated coding is analysed and improved BER performance is obtained under different channel conditions. Easily testable MAC units for filters are presented using Reed-Muller logic for realization.

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The proliferation of wireless sensor networks in a large spectrum of applications had been spurered by the rapid advances in MEMS(micro-electro mechanical systems )based sensor technology coupled with low power,Low cost digital signal processors and radio frequency circuits.A sensor network is composed of thousands of low cost and portable devices bearing large sensing computing and wireless communication capabilities. This large collection of tiny sensors can form a robust data computing and communication distributed system for automated information gathering and distributed sensing.The main attractive feature is that such a sensor network can be deployed in remote areas.Since the sensor node is battery powered,all the sensor nodes should collaborate together to form a fault tolerant network so as toprovide an efficient utilization of precious network resources like wireless channel,memory and battery capacity.The most crucial constraint is the energy consumption which has become the prime challenge for the design of long lived sensor nodes.

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Nonlinear optics has emerged as a new area of physics , following the development of various types of lasers. A number of advancements , both theoretical and experimental . have been made in the past two decades . by scientists al1 over the world. However , onl y few scientists have attempted to study the experimental aspects of nonlinear optical phenomena i n I ndian laboratories. This thesis is the report of an attempt made in this direction. The thesis contains the details of the several investigations which the author has carried out in the past few years, on optical phase conjugation (OPC) and continuous wave CCVD second harmonic generation CSHG). OPC is a new branch of nonlinear optics, developed only in the past decade. The author has done a few experiments on low power OPC in dye molecules held in solid matrices, by making use of a degenerate four wave mixing CDFWND scheme. These samples have been characterised by studies on their absorption-spectra. fluorescence spectra. triplet lifetimes and saturation intensities. Phase conjugation efficiencies with r espect to the various parameters have been i nvesti gated . DFWM scheme was also employed i n achievi ng phase conjugation of a br oadband laser C Nd: G1ass 3 using a dye solution as the nonlinear medium.

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In a sigma-delta analog to digital (A/D) As most of the sigma-delta ADC applications require converter, the most computationally intensive block is decimation filters with linear phase characteristics, the decimation filter and its hardware implementation symmetric Finite Impulse Response (FIR) filters are may require millions of transistors. Since these widely used for implementation. But the number of FIR converters are now targeted for a portable application, filter coefficients will be quite large for implementing a a hardware efficient design is an implicit requirement. narrow band decimation filter. Implementing decimation In this effect, this paper presents a computationally filter in several stages reduces the total number of filter efficient polyphase implementation of non-recursive coefficients, and hence reduces the hardware complexity cascaded integrator comb (CIC) decimators for and power consumption [2]. Sigma-Delta Converters (SDCs). The SDCs are The first stage of decimation filter can be operating at high oversampling frequencies and hence implemented very efficiently using a cascade of integrators require large sampling rate conversions. The filtering and comb filters which do not require multiplication or and rate reduction are performed in several stages to coefficient storage. The remaining filtering is performed reduce hardware complexity and power dissipation. either in single stage or in two stages with more complex The CIC filters are widely adopted as the first stage of FIR or infinite impulse response (IIR) filters according to decimation due to its multiplier free structure. In this the requirements. The amount of passband aliasing or research, the performance of polyphase structure is imaging error can be brought within prescribed bounds by compared with the CICs using recursive and increasing the number of stages in the CIC filter. The non-recursive algorithms in terms of power, speed and width of the passband and the frequency characteristics area. This polyphase implementation offers high speed outside the passband are severely limited. So, CIC filters operation and low power consumption. The polyphase are used to make the transition between high and low implementation of 4th order CIC filter with a sampling rates. Conventional filters operating at low decimation factor of '64' and input word length of sampling rate are used to attain the required transition '4-bits' offers about 70% and 37% of power saving bandwidth and stopband attenuation. compared to the corresponding recursive and Several papers are available in literature that deals non-recursive implementations respectively. The same with different implementations of decimation filter polyphase CIC filter can operate about 7 times faster architecture for sigma-delta ADCs. Hogenauer has than the recursive and about 3.7 times faster than the described the design procedures for decimation and non-recursive CIC filters.

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In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, quantum computing and nanotechnology. Low power circuits implemented using reversible logic that provides single error correction – double error detection (SEC-DED) is proposed in this paper. The design is done using a new 4 x 4 reversible gate called ‘HCG’ for implementing hamming error coding and detection circuits. A parity preserving HCG (PPHCG) that preserves the input parity at the output bits is used for achieving fault tolerance for the hamming error coding and detection circuits.

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Reversibility plays a fundamental role when logic gates such as AND, OR, and XOR are not reversible. computations with minimal energy dissipation are considered. Hence, these gates dissipate heat and may reduce the life of In recent years, reversible logic has emerged as one of the most the circuit. So, reversible logic is in demand in power aware important approaches for power optimization with its circuits. application in low power CMOS, quantum computing and A reversible conventional BCD adder was proposed in using conventional reversible gates.

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The recent trends envisage multi-standard architectures as a promising solution for the future wireless transceivers to attain higher system capacities and data rates. The computationally intensive decimation filter plays an important role in channel selection for multi-mode systems. An efficient reconfigurable implementation is a key to achieve low power consumption. To this end, this paper presents a dual-mode Residue Number System (RNS) based decimation filter which can be programmed for WCDMA and 802.16e standards. Decimation is done using multistage, multirate finite impulse response (FIR) filters. These FIR filters implemented in RNS domain offers high speed because of its carry free operation on smaller residues in parallel channels. Also, the FIR filters exhibit programmability to a selected standard by reconfiguring the hardware architecture. The total area is increased only by 24% to include WiMAX compared to a single mode WCDMA transceiver. In each mode, the unused parts of the overall architecture is powered down and bypassed to attain power saving. The performance of the proposed decimation filter in terms of critical path delay and area are tabulated.

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The recent trends envisage multi-standard architectures as a promising solution for the future wireless transceivers. The computationally intensive decimation filter plays an important role in channel selection for multi-mode systems. An efficient reconfigurable implementation is a key to achieve low power consumption. To this end, this paper presents a dual-mode Residue Number System (RNS) based decimation filter which can be programmed for WCDMA and 802.11a standards. Decimation is done using multistage, multirate finite impulse response (FIR) filters. These FIR filters implemented in RNS domain offers high speed because of its carry free operation on smaller residues in parallel channels. Also, the FIR filters exhibit programmability to a selected standard by reconfiguring the hardware architecture. The total area is increased only by 33% to include WLANa compared to a single mode WCDMA transceiver. In each mode, the unused parts of the overall architecture is powered down and bypassed to attain power saving. The performance of the proposed decimation filter in terms of critical path delay and area are tabulated

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In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, nanotechnology and quantum computing. This research proposes quick addition of decimals (QAD) suitable for multi-digit BCD addition, using reversible conservative logic. The design makes use of reversible fault tolerant Fredkin gates only. The implementation strategy is to reduce the number of levels of delay there by increasing the speed, which is the most important factor for high speed circuits.

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Extending IPv6 to IEEE 802.15.4-based Low power Wireless Personal Area Networks requires efficient header compression mechanisms to adapt to their limited bandwidth, memory and energy constraints. This paper presents an experimental evaluation of an improved header compression scheme which provides better compression of IPv6 multicast addresses and UDP port numbers compared to existing mechanisms. This scheme outperforms the existing compression mechanism in terms of data throughput of the network and energy consumption of nodes. It enhances throughput by up to 8% and reduces transmission energy of nodes by about 5%.