33 resultados para Logic, Modern


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The objective of this study is to assess the changes that have been taking place in the socio-economic profile of organized industrial workers of Kerala in the context of the changes that have been taking place in the state's industrial structure. with this object in view, the study seeks to find out the similarities and differences in the profile of workers belonging to two Segments of factory sector industries in Kerala viz., modern and traditional segments. It also seeks to examine the factors leading to the differences in profile, if any, and their consequences. As noted earlier, the profile of workers may be influenced both by external societal factors and by internal factors like the difference in industrial structure and the technologies used. It is proposed to assess the relative importance of these two groups of factors. In drawing up the profile, we seek to find out whether the workers belonging to the organised sector of industry in Kerala particularly the more modern sector have begun to form a ‘select group‘ in the Kerala society and the total work force. Wherever possible, it is proposed to compare the profile of the Kerala workers with those of workers in other states of India. As an incidental objective, it is also proposed to find out to the extent possible, whether trends towards labour embourgeoisement and class shifting have begun to set in among the industrial workers of Kerala, particularly among the workers in the modern industries as a result of their relative affluence and their middle class socioeconomic background. besides, the study seeks to find out whether there is any difference in the class consciousness of workers belonging to these two segments of organized industry, arising from the differences in their economic status and social background.

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This study enfolds the environment of deposition and the lateral variation in texture, mineralogy and geochemistry of the Ashtamudy lake sediments. While the heavy mineral and clay mineral investigations enable us to decipher the nature, texture and source of sediments; organic matter and carbonate contents and the geochemical analysis of major and minor elements help establish the distribution and concentration of the same in regard to the various physico-chemical processes operating in the lake. Study of trace elements holds prime importance in this work, since their concentrations can be used to outline the extent of contaminated bottom area, as well as the source and dispersal paths of discharged_pollutants. In short, this study brings out a vivid picture of the mineralogy and geochemistry of the lake sediments in different environments, viz., the freshwater, brackish water and marine environments that are confined to the eastern, central and western parts of the lake respectively. For the better understanding and expression of the results of the analysis, the lake has been divided into 3 zones namely: eastern part, central part and western part.

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Reversibility plays a fundamental role when logic gates such as AND, OR, and XOR are not reversible. computations with minimal energy dissipation are considered. Hence, these gates dissipate heat and may reduce the life of In recent years, reversible logic has emerged as one of the most the circuit. So, reversible logic is in demand in power aware important approaches for power optimization with its circuits. application in low power CMOS, quantum computing and A reversible conventional BCD adder was proposed in using conventional reversible gates.

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Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that performs 2 digit multiplications simultaneously in one clock cycle. This design offers low latency and high throughput. When multiplying two n-digit operands to produce a 2n-digit product, the design has a latency of (n / 2) 1 cycles. The paper presents area and delay comparisons for 7-digit, 16-digit, 34-digit double digit decimal multipliers on different families of Xilinx, Altera, Actel and Quick Logic FPGAs. The multipliers presented can be extended to support decimal floating-point multiplication for IEEE P754 standard

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In recent years, reversible logic has emerged as one of the most important approaches for power optimization with its application in low power CMOS, nanotechnology and quantum computing. This research proposes quick addition of decimals (QAD) suitable for multi-digit BCD addition, using reversible conservative logic. The design makes use of reversible fault tolerant Fredkin gates only. The implementation strategy is to reduce the number of levels of delay there by increasing the speed, which is the most important factor for high speed circuits.

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This paper presents a new approach to implement Reed-Muller Universal Logic Module (RM-ULM) networks with reduced delay and hardware for synthesizing logic functions given in Reed-Muller (RM) form. Replication of single control line RM-ULM is used as the only design unit for defining any logic function. An algorithm is proposed that does exhaustive branching to reduce the number of levels and modules required to implement any logic function in RM form. This approach attains a reduction in delay, and power over other implementations of functions having large number of variables.

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Hindi

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HINDI

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HINDI

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HINDI

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HINDI