16 resultados para logic gate
em Consorci de Serveis Universitaris de Catalunya (CSUC), Spain
Resumo:
Voltage fluctuations caused by parasitic impedances in the power supply rails of modern ICs are a major concern in nowadays ICs. The voltage fluctuations are spread out to the diverse nodes of the internal sections causing two effects: a degradation of performances mainly impacting gate delays anda noisy contamination of the quiescent levels of the logic that drives the node. Both effects are presented together, in thispaper, showing than both are a cause of errors in modern and future digital circuits. The paper groups both error mechanismsand shows how the global error rate is related with the voltage deviation and the period of the clock of the digital system.
Resumo:
El presente proyecto tenía como objetivo final el desarrollo de un sistema de control basado en Lógica Fuzzy que permita que el proceso de secado tenga una regulación continua y con una menor dependencia de la experiencia del personal experto, evitando además la formación de encostrado. Asimismo, se plantearon una serie de objetivos parciales, cuya consecución permitiría, además de alcanzar el objetivo final descrito, obtener un conocimiento científico adicional. Por ello, a continuación se resumen los resultados en relación con los objetivos parciales propuestos. Como paso previo, antes de abordar los objetivos planteados se diseñó y construyó un equipo experimental de secado, donde se controló de forma precisa la temperatura, la humedad relativa y la velocidad del aire.
Resumo:
Report for the scientific sojourn carried out at the Université Catholique de Louvain, Belgium, from March until June 2007. In the first part, the impact of important geometrical parameters such as source and drain thickness, fin spacing, spacer width, etc. on the parasitic fringing capacitance component of multiple-gate field-effect transistors (MuGFET) is deeply analyzed using finite element simulations. Several architectures such as single gate, FinFETs (double gate), triple-gate represented by Pi-gate MOSFETs are simulated and compared in terms of channel and fringing capacitances for the same occupied die area. Simulations highlight the great impact of diminishing the spacing between fins for MuGFETs and the trade-off between the reduction of parasitic source and drain resistances and the increase of fringing capacitances when Selective Epitaxial Growth (SEG) technology is introduced. The impact of these technological solutions on the transistor cut-off frequencies is also discussed. The second part deals with the study of the effect of the volume inversion (VI) on the capacitances of undoped Double-Gate (DG) MOSFETs. For that purpose, we present simulation results for the capacitances of undoped DG MOSFETs using an explicit and analytical compact model. It monstrates that the transition from volume inversion regime to dual gate behaviour is well simulated. The model shows an accurate dependence on the silicon layer thickness,consistent withtwo dimensional numerical simulations, for both thin and thick silicon films. Whereas the current drive and transconductance are enhanced in volume inversion regime, our results show thatintrinsic capacitances present higher values as well, which may limit the high speed (delay time) behaviour of DG MOSFETs under volume inversion regime.
Resumo:
A table showing a comparison and classification of tools (intelligent tutoring systems) for e-learning of Logic at a college level.
Resumo:
Studies of the EU accession of the East and Central European Countries have stressed the importance of neo-liberal institutionalism as an explanation for Member State preferences. In this paper it is argued that Member States’ preferences over Turkish EU accession are better explained by power politics and neo-realism. It seems therefore that Turkey’s way to the EU follows another path than the East and Central Countries. Turkish accession raises the question of the EU’s role in a uni-polar world order – whether the EU should develop into an independent actor on the world stage or not. However, when it comes to the interaction among the Member States in order to decide on when to open accession negotiations with Turkey the constitutive values of the EU seriously modify the outcome that pure power politics would have let to.
Resumo:
El treball desenvolupat ha consistit en analitzar el sistema d'informació Logic Class sota la perspectiva de la necessitat de construir un sistema d'indicadors (quadre de comandament operatiu) que integri informació de les diferents fonts de dades.
Resumo:
A table showing a comparison and classification of tools (intelligent tutoring systems) for e-learning of Logic at a college level.
Resumo:
PLFC is a first-order possibilistic logic dealing with fuzzy constants and fuzzily restricted quantifiers. The refutation proof method in PLFC is mainly based on a generalized resolution rule which allows an implicit graded unification among fuzzy constants. However, unification for precise object constants is classical. In order to use PLFC for similarity-based reasoning, in this paper we extend a Horn-rule sublogic of PLFC with similarity-based unification of object constants. The Horn-rule sublogic of PLFC we consider deals only with disjunctive fuzzy constants and it is equipped with a simple and efficient version of PLFC proof method. At the semantic level, it is extended by equipping each sort with a fuzzy similarity relation, and at the syntactic level, by fuzzily “enlarging” each non-fuzzy object constant in the antecedent of a Horn-rule by means of a fuzzy similarity relation.
Resumo:
Possibilistic Defeasible Logic Programming (P-DeLP) is a logic programming language which combines features from argumentation theory and logic programming, incorporating the treatment of possibilistic uncertainty at the object-language level. In spite of its expressive power, an important limitation in P-DeLP is that imprecise, fuzzy information cannot be expressed in the object language. One interesting alternative for solving this limitation is the use of PGL+, a possibilistic logic over Gödel logic extended with fuzzy constants. Fuzzy constants in PGL+ allow expressing disjunctive information about the unknown value of a variable, in the sense of a magnitude, modelled as a (unary) predicate. The aim of this article is twofold: firstly, we formalize DePGL+, a possibilistic defeasible logic programming language that extends P-DeLP through the use of PGL+ in order to incorporate fuzzy constants and a fuzzy unification mechanism for them. Secondly, we propose a way to handle conflicting arguments in the context of the extended framework.
Resumo:
In the last decade defeasible argumentation frameworks have evolved to become a sound setting to formalize commonsense, qualitative reasoning. The logic programming paradigm has shown to be particularly useful for developing different argument-based frameworks on the basis of different variants of logic programming which incorporate defeasible rules. Most of such frameworks, however, are unable to deal with explicit uncertainty, nor with vague knowledge, as defeasibility is directly encoded in the object language. This paper presents Possibilistic Logic Programming (P-DeLP), a new logic programming language which combines features from argumentation theory and logic programming, incorporating as well the treatment of possibilistic uncertainty. Such features are formalized on the basis of PGL, a possibilistic logic based on G¨odel fuzzy logic. One of the applications of P-DeLP is providing an intelligent agent with non-monotonic, argumentative inference capabilities. In this paper we also provide a better understanding of such capabilities by defining two non-monotonic operators which model the expansion of a given program P by adding new weighed facts associated with argument conclusions and warranted literals, respectively. Different logical properties for the proposed operators are studied
Resumo:
N-type as well P-type top-gate microcrystalline silicon thin film transistors (TFTs) are fabricated on glass substrates at a maximum temperature of 200 °C. The active layer is an undoped μc-Si film, 200 nm thick, deposited by Hot-Wire Chemical Vapor. The drain and source regions are highly phosphorus (N-type TFTs) or boron (P-type TFTs)-doped μc-films deposited by HW-CVD. The gate insulator is a silicon dioxide film deposited by RF sputtering. Al-SiO 2-N type c-Si structures using this insulator present low flat-band voltage,-0.2 V, and low density of states at the interface D it=6.4×10 10 eV -1 cm -2. High field effect mobility, 25 cm 2/V s for electrons and 1.1 cm 2/V s for holes, is obtained. These values are very high, particularly the hole mobility that was never reached previously.
Resumo:
We report on a field-effect light emitting device based on silicon nanocrystals in silicon oxide deposited by plasma-enhanced chemical vapor deposition. The device shows high power efficiency and long lifetime. The power efficiency is enhanced up to 0.1 %25 by the presence of a silicon nitride control layer. The leakage current reduction induced by this nitride buffer effectively increases the power efficiency two orders of magnitude with regard to similarly processed devices with solely oxide. In addition, the nitride cools down the electrons that reach the polycrystalline silicon gate lowering the formation of defects, which significantly reduces the device degradation.