Optimization of KOH etching process to obtain textured substrates suitable for heterojunction solar cells fabricated by HWCVD

In this work, we have studied the texturization process of (100) c-Si wafers using a low concentration potassium hydroxide solution in order to obtain good quality textured wafers. The optimization of the etching conditions have led to random but uniform pyramidal structures with good optical properties. Then, symmetric heterojunctions were deposited by Hot-Wire CVD onto these substrates and the Quasi-Steady-State PhotoConductance technique was used to measure passivation quality. Little degradation in the effective lifetime and implicit open circuit voltage of these devices (< 20 mV) was observed in all cases. It is especially remarkable that for big uniform pyramids, the open-circuit voltage is comparable to the values obtained on flat substrates.

Preparació de puntes de tungstè per a microscòpia d'efecte túnel (STM)

Es presenten els resultats experimentals obtinguts durant l’estudi sistemàtic realitzat de la preparació electroquímica de puntes de tungstè per al Microscopi d’Efecte Túnel (STM), fent servir dos electròlits: KOH i NaOH. L’estudi sobre la morfologia, longitud de la punta i radi de curvatura de la punta en funció del voltatge aplicat i les concentracions de l’electròlit es descriu al capítol 3. La caracterització de les puntes es va dur a terme, per una part, mitjançant un microscòpic electrònic de rastreig (SEM) i per l’altre banda, amb el ús de les puntes obtingudes al STM. En resumen, els resultats mostren que ambdós electròlits permeten obtenir puntes que es poden fer servir amb èxit per l’obtenció d’imatges amb l’STM. Les millors puntes són aquelles que s’obtenen dins de rangs de concentracions d’electròlit baixes, entre valor de 10 a 15% en pes pel NaOH i entre 10 i 20% pel KOH i rangs de voltatge entre 3 a 7 V pel NaOH i 4 a 8 V pel KOH. S’observa que es requereixen temps d’atac electroquímic menors fent servir com a electròlit NaOH. S’estudia, en el capítol 4, el tractament que requereix la punta per tal d’eliminar les impureses de la seva superfície. Es realitzen diferents proves amb tres mètodes de neteja: (1) tractament químic, (2) bombardeig iònic i (3) tractament tèrmic de recuit. En el capítol 5 del projecte s’analitzen les imatges d’una mostra d’or, Au(110), d’estructura coneguda, amb el microscopi d’efecte túnel STM) del laboratori fent servir les puntes obtingudes sota les condicions considerades òptimes. El resultat confirma el bon comportament de les puntes obtingudes sota les condicions descrites en els capítols anteriors i establert una pauta a seguir per obtenir puntes d’una manera senzilla i reproduïble.

Solving Large Location-Allocation problems by Clustering and Simulated Annealing

Globalization involves several facility location problems that need to be handled at large scale. Location Allocation (LA) is a combinatorial problem in which the distance among points in the data space matter. Precisely, taking advantage of the distance property of the domain we exploit the capability of clustering techniques to partition the data space in order to convert an initial large LA problem into several simpler LA problems. Particularly, our motivation problem involves a huge geographical area that can be partitioned under overall conditions. We present different types of clustering techniques and then we perform a cluster analysis over our dataset in order to partition it. After that, we solve the LA problem applying simulated annealing algorithm to the clustered and non-clustered data in order to work out how profitable is the clustering and which of the presented methods is the most suitable

Low-loss rib waveguides containing Si nanocrystals embedded in SiO2

We report on the study and modeling of the structural and optical properties of rib-loaded waveguides working in the 600-900-nm spectral range. A Si nanocrystal (Si-nc) rich SiO2 layer with nominal Si excess ranging from 10% to 20% was produced by quadrupole ion implantation of Si into thermal SiO2 formed on a silicon substrate. Si-ncs were precipitated by annealing at 1100°C, forming a 0.4-um-thick core layer in the waveguide. The Si content, the Si-nc density and size, the Si-nc emission, and the active layer effective refractive index were determined by dedicated experiments using x-ray photoelectron spectroscopy, Raman spectroscopy, energy-filtered transmission electron microscopy, photoluminescence and m-lines spectroscopy. Rib-loaded waveguides were fabricated by photolithographic and reactive ion etching processes, with patterned rib widths ranging from 1¿to¿8¿¿m. Light propagation in the waveguide was observed and losses of 11dB/cm at 633 and 780 nm were measured, modeled and interpreted.

The effect of substrate on high-temperature annealing of GaN epilayers: Si versus sapphire

We have studied the effects of rapid thermal annealing at 1300¿°C on GaN epilayers grown on AlN buffered Si(111) and on sapphire substrates. After annealing, the epilayers grown on Si display visible alterations with craterlike morphology scattered over the surface. The annealed GaN/Si layers were characterized by a range of experimental techniques: scanning electron microscopy, optical confocal imaging, energy dispersive x-ray microanalysis, Raman scattering, and cathodoluminescence. A substantial Si migration to the GaN epilayer was observed in the crater regions, where decomposition of GaN and formation of Si3N4 crystallites as well as metallic Ga droplets and Si nanocrystals have occurred. The average diameter of the Si nanocrystals was estimated from Raman scattering to be around 3¿nm. Such annealing effects, which are not observed in GaN grown on sapphire, are a significant issue for applications of GaN grown on Si(111) substrates when subsequent high-temperature processing is required.

Influence of premetallization surface treatment on the formation of Schottky Au-nGaN contacts

The influence of premetallization surface preparation on the structural, chemical, and electrical properties of Au-nGaN interfaces has been investigated by x-ray photoemission spectroscopy (XPS), current-voltage measurement (I-V) and cross-section transmission electron microscopy (TEM). XPS analysis showed that the three GaN substrate treatments investigated i.e., ex situ hydrofluoric acid etch, in situ anneal in ultrahigh-vacuum (UHV), and in situ Ga reflux cleaning in UHV result in surfaces increasingly free of oxygen contamination. XPS and TEM characterization of Au-nGaN formed after the three premetallization surface treatments show that HF etching and UHV annealing produce abrupt, well-defined interfaces. Conversely, GaN substrate cleaning in a Ga flux results in Au/GaN intermixing. I-V characterization of Au¿nGaN contacts yields a Schottky barrier height of 1.25 eV with a very low-ideality factor and very good contact uniformity for the premetallization UHV anneal, while the Ga reflux cleaning results in a much lower barrier (0.85 eV), with poor ideality and uniformity. I-V and XPS results suggest a high density of acceptor states at the surface, which is further enhanced by UHV annealing. These results are discussed in the context of current models of Schottky barrier formation.

Development of laser-fired contacts for amorphous silicon layers obtained by Hot-Wire CVD

In this work we study aluminium laser-fired contacts for intrinsic amorphous silicon layers deposited by Hot-Wire CVD. This structure could be used as an alternative low temperature back contact for rear passivated heterojunction solar cells. An infrared Nd:YAG laser (1064 nm) has been used to locally fire the aluminium through the thin amorphous silicon layers. Under optimized laser firing parameters, very low specific contact resistances (ρc ∼ 10 mΩ cm2) have been obtained on 2.8 Ω cm p-type c-Si wafers. This investigation focuses on maintaining the passivation quality of the interface without an excessive increase in the series resistance of the device.

Uniformity Study of Amorphous and Microcrystalline Silicon Thin Films Deposited on 10cmx10cm Glass Substrate using Hot Wire CVD Technique

The scaling up of the Hot Wire Chemical Vapor Deposition (HW-CVD) technique to large deposition area can be done using a catalytic net of equal spaced parallel filaments. The large area deposition limit is defined as the limit whenever a further increment of the catalytic net area does not affect the properties of the deposited film. This is the case when a dense catalytic net is spread on a surface considerably larger than that of the film substrate. To study this limit, a system able to hold a net of twelve wires covering a surface of about 20 cm x 20 cm was used to deposit amorphous (a-Si:H) and microcrystalline (μc-Si:H) silicon over a substrate of 10 cm x 10 cm placed at a filament-substrate distance ranging from 1 to 2 cm. The uniformity of the film thickness d and optical constants, n(x, λ) and α(x,¯hω), was studied via transmission measurements. The thin film uniformity as a function of the filament-substrate distance was studied. The experimental thickness profile was compared with the theoretical result obtained solving the diffusion equations. The optimization of the filament-substrate distance allowed obtaining films with inhomogeneities lower than ±2.5% and deposition rates higher than 1 nm/s and 4.5 nm/s for (μc-Si:H) and (a-Si:H), respectively.

Low temperature amorphous and nanocrystalline silicon thin film transistors deposited by Hot-Wire CVD on glass substrate

Amorphous and nanocrystalline silicon films obtained by Hot-Wire Chemical Vapor Deposition have been incorporated as active layers in n-type coplanar top gate thin film transistors deposited on glass substrates covered with SiO 2. Amorphous silicon devices exhibited mobility values of 1.3 cm 2 V - 1 s - 1, which are very high taking into account the amorphous nature of the material. Nanocrystalline transistors presented mobility values as high as 11.5 cm 2 V - 1 s - 1 and resulted in low threshold voltage shift (∼ 0.5 V).

Substrate influence on the properties of doped thin silicon layers grown by Cat-CVD

We present structural and electrical properties for p- and n-type layers grown close to the transition between a-Si:H and nc-Si:H onto different substrates: Corning 1737 glass, ZnO:Al-coated glass and stainless steel. Structural properties were observed to depend on the substrate properties for samples grown under the same deposition conditions. Different behaviour was observed for n- and p-type material. Stainless steel seemed to enhance crystallinity when dealing with n-type layers, whereas an increased crystalline fraction was obtained on glass for p-type samples. Electrical conduction in the direction perpendicular to the substrate seemed to be mainly determined by the interfaces or by the existence of an amorphous incubation layer that might determine the electrical behaviour. In the direction perpendicular to the substrate, n-type layers exhibited a lower resistance value than p-type ones, showing better contact properties between the layer and the substrate.

Shutterless deposition of phosphorous doped microcrystalline silicon by Cat-CVD

In this paper we present results on phosphorous-doped μc-Si:H by catalytic chemical vapour deposition in a reactor with an internal arrangement that does not include a shutter. An incubation phase of around 20 nm seems to be the result of the uncontrolled conditions that take place during the first stages of deposition. The optimal deposition conditions found lead to a material with a dark conductivity of 12.8 S/cm, an activation energy of 0.026 eV and a crystalline fraction of 0.86. These values make the layers suitable to be implemented in solar cells.

Thin silicon films ranging from amorphous to nanocrystalline obtained by Hot-Wire CVD

In this paper, we have presented results on silicon thin films deposited by hot-wire CVD at low substrate temperatures (200 °C). Films ranging from amorphous to nanocrystalline were obtained by varying the filament temperature from 1500 to 1800 °C. A crystalline fraction of 50% was obtained for the sample deposited at 1700 °C. The results obtained seemed to indicate that atomic hydrogen plays a leading role in the obtaining of nanocrystalline silicon. The optoelectronic properties of the amorphous material obtained in these conditions are slightly poorer than the ones observed in device-grade films grown by plasma-enhanced CVD due to a higher hydrogen incorporation (13%).

Optimisation of doped microcrystalline silicon films deposited at very low temperatures by Hot-Wire CVD

In this paper we present new results on doped μc-Si:H thin films deposited by hot-wire chemical vapour deposition (HWCVD) in the very low temperature range (125-275°C). The doped layers were obtained by the addition of diborane or phosphine in the gas phase during deposition. The incorporation of boron and phosphorus in the films and their influence on the crystalline fraction are studied by secondary ion mass spectrometry and Raman spectroscopy, respectively. Good electrical transport properties were obtained in this deposition regime, with best dark conductivities of 2.6 and 9.8 S cm -1 for the p- and n-doped films, respectively. The effect of the hydrogen dilution and the layer thickness on the electrical properties are also studied. Some technological conclusions referred to cross contamination could be deduced from the nominally undoped samples obtained in the same chamber after p- and n-type heavily doped layers.

Chemical etching without acids: from early etching solutions to today's corrosive salts

Conferència impartida a l'Accademia di Belle Arti di Bologna en motiu de de les jornades "Atossico incisione e la sua introduzione in istruzione superiore", del 25 al 27 de gener del 2011 a Bologna