22 resultados para Integrated circuits Ultra large scale integration

em Consorci de Serveis Universitaris de Catalunya (CSUC), Spain


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Voltage fluctuations caused by parasitic impedances in the power supply rails of modern ICs are a major concern in nowadays ICs. The voltage fluctuations are spread out to the diverse nodes of the internal sections causing two effects: a degradation of performances mainly impacting gate delays anda noisy contamination of the quiescent levels of the logic that drives the node. Both effects are presented together, in thispaper, showing than both are a cause of errors in modern and future digital circuits. The paper groups both error mechanismsand shows how the global error rate is related with the voltage deviation and the period of the clock of the digital system.

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Process variations are a major bottleneck for digital CMOS integrated circuits manufacturability and yield. That iswhy regular techniques with different degrees of regularity are emerging as possible solutions. Our proposal is a new regular layout design technique called Via-Configurable Transistors Array (VCTA) that pushes to the limit circuit layout regularity for devices and interconnects in order to maximize regularity benefits. VCTA is predicted to perform worse than the Standard Cell approach designs for a certain technology node but it will allow the use of a future technology on an earlier time. Ourobjective is to optimize VCTA for it to be comparable to the Standard Cell design in an older technology. Simulations for the first unoptimized version of our VCTA of delay and energy consumption for a Full Adder circuit in the 90 nm technology node are presented and also the extrapolation for Carry-RippleAdders from 4 bits to 64 bits.

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The supply voltage decrease and powerconsumption increase of modern ICs made the requirements for low voltage fluctuation caused by packaging and on-chip parasitic impedances more difficult to achieve. Most of the research works on the area assume that all the nodes of the chip are fed at thesame voltage, in such a way that the main cause of disturbance or fluctuation is the parasitic impedance of packaging. In the paper an approach to analyze the effect of high and fast current demands on the on-chip power supply network. First an approach to model the entire network by considering a homogeneous conductive foil is presented. The modification of the timing parameters of flipflops caused by spatial voltage drops through the IC surface are also investigated.

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This paper presents a probabilistic approach to model the problem of power supply voltage fluctuations. Error probability calculations are shown for some 90-nm technology digital circuits.The analysis here considered gives the timing violation error probability as a new design quality factor in front of conventional techniques that assume the full perfection of the circuit. The evaluation of the error bound can be useful for new design paradigms where retry and self-recoveringtechniques are being applied to the design of high performance processors. The method here described allows to evaluate the performance of these techniques by means of calculating the expected error probability in terms of power supply distribution quality.

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A select-divide-and-conquer variational method to approximate configuration interaction (CI) is presented. Given an orthonormal set made up of occupied orbitals (Hartree-Fock or similar) and suitable correlation orbitals (natural or localized orbitals), a large N-electron target space S is split into subspaces S0,S1,S2,...,SR. S0, of dimension d0, contains all configurations K with attributes (energy contributions, etc.) above thresholds T0={T0egy, T0etc.}; the CI coefficients in S0 remain always free to vary. S1 accommodates KS with attributes above T1≤T0. An eigenproblem of dimension d0+d1 for S0+S 1 is solved first, after which the last d1 rows and columns are contracted into a single row and column, thus freezing the last d1 CI coefficients hereinafter. The process is repeated with successive Sj(j≥2) chosen so that corresponding CI matrices fit random access memory (RAM). Davidson's eigensolver is used R times. The final energy eigenvalue (lowest or excited one) is always above the corresponding exact eigenvalue in S. Threshold values {Tj;j=0, 1, 2,...,R} regulate accuracy; for large-dimensional S, high accuracy requires S 0+S1 to be solved outside RAM. From there on, however, usually a few Davidson iterations in RAM are needed for each step, so that Hamiltonian matrix-element evaluation becomes rate determining. One μhartree accuracy is achieved for an eigenproblem of order 24 × 106, involving 1.2 × 1012 nonzero matrix elements, and 8.4×109 Slater determinants

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The presynaptic plasma membrane (PSPM) of cholinergic nerve terminals was purified from Torpedo electric organ using a large-scale procedure. Up to 500 g of frozen electric organ were fractioned in a single run, leading to the isolation of greater than 100 mg of PSPM proteins. The purity of the fraction is similar to that of the synaptosomal plasma membrane obtained after subfractionation of Torpedo synaptosomes as judged by its membrane-bound acetylcholinesterase activity, the number of Glycera convoluta neurotoxin binding sites, and the binding of two monoclonal antibodies directed against PSPM. The specificity of these antibodies for the PSPM is demonstrated by immunofluorescence microscopy.

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Bionformatics is a rapidly evolving research field dedicated toanalyzing and managing biological data with computational resources. This paperaims to overview some of the processes and applications currently implementedat CCiT-UB¿s Bioinformatics Unit, focusing mainly on the areas of Genomics,Transcriptomics and Proteomics

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We have investigated the behavior of bistable cells made up of four quantum dots and occupied by two electrons, in the presence of realistic confinement potentials produced by depletion gates on top of a GaAs/AlGaAs heterostructure. Such a cell represents the basic building block for logic architectures based on the concept of quantum cellular automata (QCA) and of ground state computation, which have been proposed as an alternative to traditional transistor-based logic circuits. We have focused on the robustness of the operation of such cells with respect to asymmetries derived from fabrication tolerances. We have developed a two-dimensional model for the calculation of the electron density in a driven cell in response to the polarization state of a driver cell. Our method is based on the one-shot configuration-interaction technique, adapted from molecular chemistry. From the results of our simulations, we conclude that an implementation of QCA logic based on simple ¿hole arrays¿ is not feasible, because of the extreme sensitivity to fabrication tolerances. As an alternative, we propose cells defined by multiple gates, where geometrical asymmetries can be compensated for by adjusting the bias voltages. Even though not immediately applicable to the implementation of logic gates and not suitable for large scale integration, the proposed cell layout should allow an experimental demonstration of a chain of QCA cells.

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This paper presents a novel technique to align partial 3D reconstructions of the seabed acquired by a stereo camera mounted on an autonomous underwater vehicle. Vehicle localization and seabed mapping is performed simultaneously by means of an Extended Kalman Filter. Passive landmarks are detected on the images and characterized considering 2D and 3D features. Landmarks are re-observed while the robot is navigating and data association becomes easier but robust. Once the survey is completed, vehicle trajectory is smoothed by a Rauch-Tung-Striebel filter obtaining an even better alignment of the 3D views and yet a large-scale acquisition of the seabed

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A technique for simultaneous localisation and mapping (SLAM) for large scale scenarios is presented. This solution is based on the use of independent submaps of a limited size to map large areas. In addition, a global stochastic map, containing the links between adjacent submaps, is built. The information in both levels is corrected every time a loop is closed: local maps are updated with the information from overlapping maps, and the global stochastic map is optimised by means of constrained minimisation

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In the last few years, some of the visionary concepts behind the virtual physiological human began to be demonstrated on various clinical domains, showing great promise for improving healthcare management. In the current work, we provide an overview of image- and biomechanics-based techniques that, when put together, provide a patient-specific pipeline for the management of intracranial aneurysms. The derivation and subsequent integration of morphological, morphodynamic, haemodynamic and structural analyses allow us to extract patient-specific models and information from which diagnostic and prognostic descriptors can be obtained. Linking such new indices with relevant clinical events should bring new insights into the processes behind aneurysm genesis, growth and rupture. The development of techniques for modelling endovascular devices such as stents and coils allows the evaluation of alternative treatment scenarios before the intervention takes place and could also contribute to the understanding and improved design of more effective devices. A key element to facilitate the clinical take-up of all these developments is their comprehensive validation. Although a number of previously published results have shown the accuracy and robustness of individual components, further efforts should be directed to demonstrate the diagnostic and prognostic efficacy of these advanced tools through large-scale clinical trials.

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A systematic method to improve the quality (Q) factor of RF integrated inductors is presented in this paper. The proposed method is based on the layout optimization to minimize the series resistance of the inductor coil, taking into account both ohmic losses, due to conduction currents, and magnetically induced losses, due to eddy currents. The technique is particularly useful when applied to inductors in which the fabrication process includes integration substrate removal. However, it is also applicable to inductors on low-loss substrates. The method optimizes the width of the metal strip for each turn of the inductor coil, leading to a variable strip-width layout. The optimization procedure has been successfully applied to the design of square spiral inductors in a silicon-based multichip-module technology, complemented with silicon micromachining postprocessing. The obtained experimental results corroborate the validity of the proposed method. A Q factor of about 17 have been obtained for a 35-nH inductor at 1.5 GHz, with Q values higher than 40 predicted for a 20-nH inductor working at 3.5 GHz. The latter is up to a 60% better than the best results for a single strip-width inductor working at the same frequency.

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En el context actual sovint tenen lloc operacions juridicofinanceres de gran envergadura entre empreses del mateix grup, especialment en determinats sectors de l'economia. Aquestes operacions comporten la integració dels sistemes d'informació de les societats que s'hi troben afectades. El cas que ens ocupa fa referència a una operació de fusió per absorció de dues societats que pertanyen al mateix grup. Totes dues gestionen la seva activitat fent servir el sistema d'informació SAP/R3.