217 resultados para Real building fire


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Modelling the fundamental performance limits of wireless sensor networks (WSNs) is of paramount importance to understand the behaviour of WSN under worst case conditions and to make the appropriate design choices. In that direction, this paper contributes with a methodology for modelling cluster tree WSNs with a mobile sink. We propose closed form recurrent expressions for computing the worst case end to end delays, buffering and bandwidth requirements across any source-destination path in the cluster tree assuming error free channel. We show how to apply our theoretical results to the specific case of IEEE 802.15.4/ZigBee WSNs. Finally, we demonstrate the validity and analyze the accuracy of our methodology through a comprehensive experimental study, therefore validating the theoretical results through experimentation.

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Most of today’s embedded systems are required to work in dynamic environments, where the characteristics of the computational load cannot always be predicted in advance. Furthermore, resource needs are usually data dependent and vary over time. Resource constrained devices may need to cooperate with neighbour nodes in order to fulfil those requirements and handle stringent non-functional constraints. This paper describes a framework that facilitates the distribution of resource intensive services across a community of nodes, forming temporary coalitions for a cooperative QoSaware execution. The increasing need to tailor provided service to each application’s specific needs determines the dynamic selection of peers to form such a coalition. The system is able to react to load variations, degrading its performance in a controlled fashion if needed. Isolation between different services is achieved by guaranteeing a minimal service quality to accepted services and by an efficient overload control that considers the challenges and opportunities of dynamic distributed embedded systems.

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The IEEE 802.15.4 protocol proposes a flexible communication solution for Low-Rate Wireless Personal Area Networks including sensor networks. It presents the advantage to fit different requirements of potential applications by adequately setting its parameters. When enabling its beacon mode, the protocol makes possible real-time guarantees by using its Guaranteed Time Slot (GTS) mechanism. This paper analyzes the performance of the GTS allocation mechanism in IEEE 802.15.4. The analysis gives a full understanding of the behavior of the GTS mechanism with regards to delay and throughput metrics. First, we propose two accurate models of service curves for a GTS allocation as a function of the IEEE 802.15.4 parameters. We then evaluate the delay bounds guaranteed by an allocation of a GTS using Network Calculus formalism. Finally, based on the analytic results, we analyze the impact of the IEEE 802.15.4 parameters on the throughput and delay bound guaranteed by a GTS allocation. The results of this work pave the way for an efficient dimensioning of an IEEE 802.15.4 cluster.

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Dependability is a critical factor in computer systems, requiring high quality validation & verification procedures in the development stage. At the same time, digital devices are getting smaller and access to their internal signals and registers is increasingly complex, requiring innovative debugging methodologies. To address this issue, most recent microprocessors include an on-chip debug (OCD) infrastructure to facilitate common debugging operations. This paper proposes an enhanced OCD infrastructure with the objective of supporting the verification of fault-tolerant mechanisms through fault injection campaigns. This upgraded on-chip debug and fault injection (OCD-FI) infrastructure provides an efficient fault injection mechanism with improved capabilities and dynamic behavior. Preliminary results show that this solution provides flexibility in terms of fault triggering and allows high speed real-time fault injection in memory elements

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Fault injection is frequently used for the verification and validation of dependable systems. When targeting real time microprocessor based systems the process becomes significantly more complex. This paper proposes two complementary solutions to improve real time fault injection campaign execution, both in terms of performance and capabilities. The methodology is based on the use of the on-chip debug mechanisms present in modern electronic devices. The main objective is the injection of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented and compared in terms of performance gain and logic overhead.

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As electronic devices get smaller and more complex, dependability assurance is becoming fundamental for many mission critical computer based systems. This paper presents a case study on the possibility of using the on-chip debug infrastructures present in most current microprocessors to execute real time fault injection campaigns. The proposed methodology is based on a debugger customized for fault injection and designed for maximum flexibility, and consists of injecting bit-flip type faults on memory elements without modifying or halting the target application. The debugger design is easily portable and applicable to different architectures, providing a flexible and efficient mechanism for verifying and validating fault tolerant components.

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The rapid increase in the use of microprocessor-based systems in critical areas, where failures imply risks to human lives, to the environment or to expensive equipment, significantly increased the need for dependable systems, able to detect, tolerate and eventually correct faults. The verification and validation of such systems is frequently performed via fault injection, using various forms and techniques. However, as electronic devices get smaller and more complex, controllability and observability issues, and sometimes real time constraints, make it harder to apply most conventional fault injection techniques. This paper proposes a fault injection environment and a scalable methodology to assist the execution of real-time fault injection campaigns, providing enhanced performance and capabilities. Our proposed solutions are based on the use of common and customized on-chip debug (OCD) mechanisms, present in many modern electronic devices, with the main objective of enabling the insertion of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented starting from basic Components Off-The-Shelf (COTS) microprocessors, equipped with real-time OCD infrastructures, to improved solutions based on modified interfaces, and dedicated OCD circuitry that enhance fault injection capabilities and performance. All methodologies and configurations were evaluated and compared concerning performance gain and silicon overhead.

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A área da simulação computacional teve um rápido crescimento desde o seu apareciment, sendo actualmente uma das ciências de gestão e de investigação operacional mais utilizadas. O seu princípio baseia-se na replicação da operação de processos ou sistemas ao longo de períodos de tempo, tornando-se assim uma metodologia indispensável para a resolução de variados problemas do mundo real, independentemente da sua complexidade. Das inúmeras áreas de aplicação, nos mais diversos campos, a que mais se destaca é a utilização em sistemas de produção, onde o leque de aplicações disponível é muito vasto. A sua aplicação tem vindo a ser utilizada para solucionar problemas em sistemas de produção, uma vez que permite às empresas ajustar e planear de uma maneira rápida, eficaz e ponderada as suas operações e os seus sistemas, permitindo assim uma rápida adaptação das mesmas às constantes mudanças das necessidades da economia global. As aplicações e packages de simulação têm seguindo as tendências tecnológicas pelo que é notório o recurso a tecnologias orientadas a objectos para o desenvolvimento das mesmas. Este estudo baseou-se, numa primeira fase, na recolha de informação de suporte aos conceitos de modelação e simulação, bem como a respectiva aplicação a sistemas de produção em tempo real. Posteriormente centralizou-se no desenvolvimento de um protótipo de uma aplicação de simulação de ambientes de fabrico em tempo real. O desenvolvimento desta ferramenta teve em vista eventuais fins pedagógicos e uma utilização a nível académico, sendo esta capaz de simular um modelo de um sistema de produção, estando também dotada de animação. Sem deixar de parte a possibilidade de integração de outros módulos ou, até mesmo, em outras plataformas, houve ainda a preocupação acrescida de que a sua implementação recorresse a metodologias de desenvolvimento orientadas a objectos.

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The Casa da Música Foundation, responsible for the management of Casa da Música do Porto building, has the need to obtain statistical data related to the number of building’s visitors. This information is a valuable tool for the elaboration of periodical reports concerning the success of this cultural institution. For this reason it was necessary to develop a system capable of returning the number of visitors for a requested period of time. This represents a complex task due to the building’s unique architectural design, characterized by very large doors and halls, and the sudden large number of people that pass through them in moments preceding and proceeding the different activities occurring in the building. To achieve the technical solution for this challenge, several image processing methods, for people detection with still cameras, were first studied. The next step was the development of a real time algorithm, using OpenCV libraries and computer vision concepts,to count individuals with the desired accuracy. This algorithm includes the scientific and technical knowledge acquired in the study of the previous methods. The themes developed in this thesis comprise the fields of background maintenance, shadow and highlight detection, and blob detection and tracking. A graphical interface was also built, to help on the development, test and tunning of the proposed system, as a complement to the work. Furthermore, tests to the system were also performed, to certify the proposed techniques against a set of limited circumstances. The results obtained revealed that the algorithm was successfully applied to count the number of people in complex environments with reliable accuracy.

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To increase the amount of logic available to the users in SRAM-based FPGAs, manufacturers are using nanometric technologies to boost logic density and reduce costs, making its use more attractive. However, these technological improvements also make FPGAs particularly vulnerable to configuration memory bit-flips caused by power fluctuations, strong electromagnetic fields and radiation. This issue is particularly sensitive because of the increasing amount of configuration memory cells needed to define their functionality. A short survey of the most recent publications is presented to support the options assumed during the definition of a framework for implementing circuits immune to bit-flips induction mechanisms in memory cells, based on a customized redundant infrastructure and on a detection-and-fix controller.

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Fault injection is frequently used for the verification and validation of the fault tolerant features of microprocessors. This paper proposes the modification of a common on-chip debugging (OCD) infrastructure to add fault injection capabilities and improve performance. The proposed solution imposes a very low logic overhead and provides a flexible and efficient mechanism for the execution of fault injection campaigns, being applicable to different target system architectures.

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The new generations of SRAM-based FPGA (field programmable gate array) devices are the preferred choice for the implementation of reconfigurable computing platforms intended to accelerate processing in real-time systems. However, FPGA's vulnerability to hard and soft errors is a major weakness to robust configurable system design. In this paper, a novel built-in self-healing (BISH) methodology, based on run-time self-reconfiguration, is proposed. A soft microprocessor core implemented in the FPGA is responsible for the management and execution of all the BISH procedures. Fault detection and diagnosis is followed by repairing actions, taking advantage of the dynamic reconfiguration features offered by new FPGA families. Meanwhile, modular redundancy assures that the system still works correctly

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Following a prescribed fire in a Pinus pinaster forest site located in the north-west Portugal, monitoring of any changes in selected soil characteristics and soil hydrology was undertaken to assess the effects of burning on the following: pH, electrical conductivity, water content, organic carbon and porosity. Thirty plots were established on a regular grid. At each sample plot before and after the fire, samples were collected (disturbed samples from depths of 0-1cm and 1-5cm; undisturbed core samples from 0-5cm). The results indicate that there was no measurable impact on the properties of the soil following this carefully conducted prescribed fire. The fire only affected the litter layer, as intended. Confirmation of this minimal impact on the soil was provided by regrowth of grasses and herbs already occurring two months after the fire. The implication is, therefore, that provided this wildfire-risk reduction strategy is carried out under existing strict guidelines, any impact on soil quality will be minimal.

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Nesta dissertação pretende-se caracterizar o desempenho energético de um grande edifício de serviços existente, da tipologia ensino, avaliar e identificar potenciais medidas que melhorem aquele desempenho, permitindo, em complemento, determinar a sua classificação energética no âmbito da legislação vigente. A pertinência do estudo prende-se com a avaliação do desempenho energético dos edifícios e com o estudo de medidas de melhoria que permitam incrementar a eficiência energética, por recurso a um programa de simulação energética dinâmica certificado – DesignBuilder e tendo em conta a regulamentação portuguesa em vigor. Inicialmente procedeu-se à modelação do edifício com recurso ao programa DesignBuilder, e, simultaneamente, realizou-se um levantamento de todas as suas características ao nível de geometria, pormenores construtivos, sistemas AVAC e de iluminação e fontes de energia utilizadas. Com vista à caracterização do modo de operação do edifício, foi realizado um levantamento dos perfis reais de utilização em termos de ocupação, iluminação e equipamentos para os vários espaços. Foram realizadas medições de caudais de ar novo e da temperatura do ar, em alguns equipamentos e alguns espaços específicos. Foram realizadas medições em tempo real e leituras de contagens da energia eléctrica utilizada, quer em período de aulas quer em período de férias, que permitiram a desagregação das facturas da energia eléctrica que se apresentam globais para o campus do ISEP. Foram realizadas leituras de contagens de gás natural. Em sequência, foi realizada a simulação energética dinâmica com o intuito de ajustar o modelo criado aos consumos reais e de analisar medidas de melhoria que lhe conferissem um melhor desempenho energético. Essas medidas são agrupadas em quatro tipos: - Medidas de natureza comportamental; - Medidas de melhoria da eficiência energética nos sistemas de iluminação; - Medidas de melhoria de eficiência energética nos sistemas AVAC;- Medidas que visam a introdução de energias de fonte renovável; Em sequência, foi elaborada a simulação nominal e calculados os indicadores de eficiência energética com vista à respectiva classificação energética do edifício, tendo o edifício apresentado uma Classe Energética D de acordo com a escala do SCE. Finalmente, foi avaliado o impacto das diferentes medidas de melhoria identificadas e com potencial de aplicação, isto é, que apresentaram um retorno simples do investimento inferior a oito anos, tanto ao nível do desempenho energético real do edifício, como ao nível da sua classificação energética. De onde se concluiu que existe um potencial de 7% de redução nos consumos energéticos actuais do edifício e de 18% se o funcionamento do edifício for em pleno, ou seja, se todos os seus sistemas estiverem efectivamente em funcionamento, e que terá impacto na classificação energética alcançado uma Classe Energética C.

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Esta dissertação considera a importância da avaliação imobiliária no mercado imobiliário, nas mais diversas situações. Contudo, cinge-se à determinação de um presumível valor de transação para apartamentos, moradias, lojas e terrenos, para venda ou arrendamento. Os mercados imobiliários escolhidos são dois concelhos conhecidos, da autora, por ser mais fácil a perceção dos locais e preços de venda. Foi escolhido o Concelho de Valongo para apartamentos, moradias e terrenos e o Concelho da Maia para lojas. Para determinarmos os valores em estudo adotaram-se os métodos de avaliação imobiliária mais comuns nomeadamente: o Método Comparativo, Método do Rendimento e o Método do Custo. São apresentados os métodos de avaliação mais utilizados, descrevendo-se a aplicação de cada um deles e as suas condições necessárias. Fez-se uma comparação entre cada um o que permitiu concluir sobre os mesmos. A recolha dos imóveis objeto de estudo foi efetuada em Sites de empresas imobiliárias que dispunham de informação necessária ao âmbito do trabalho. Aplicaram-se os métodos a cada caso recolhido e posteriormente fez-se a comparação dos resultados obtidos. Através de tratamento estatístico, utilizaram-se as técnicas de regressão múltipla para análise de relações entre os métodos de avaliação aplicados. Por fim, retiraram-se conclusões sobre a relação existente entre os três métodos de avaliação.