Controlo de velocidade e monitorização de um motor de indução trifásico suportados em microcontrolador

O bom desempenho dos motores de indução trifásicos, ao nível do binário, em velocidades de funcionamento abaixo da velocidade nominal, faz deles uma boa opção para realizar o controlo de velocidade nesta gama de velocidades. Actualmente, com o rápido avanço da electrónica de potência é mais acessível a implementação de dispositivos que permitam variar a velocidade dos motores de indução trifásicos, contribuindo para que estas máquinas sejam cada vez mais utilizadas em accionamentos de velocidade variável. Este trabalho tem como objectivo o estudo prático da utilização da técnica de controlo escalar por variação simultânea da tensão e frequência (V/f) no accionamento do motor de indução trifásico. Para o efeito, foi implementado um conversor de potência compacto do tipo ondulador de tensão trifásico. Os sinais de comando para o conversor, que utilizam a modulação por largura de impulso, são gerados por um microcontrolador, que para além das capacidades normais de um dispositivo desse tipo, pemite ainda o processamento digital de sinal. O microcontrolador permite ainda a monitorização da velocidade de rotação do motor e da corrente no motor. A análise do desempenho do sistema incide essencialmente sobre o controlo da velocidade de rotação do motor, tendo sido criadas várias condições de funcionamento, com diferentes inclinações das rampas de aceleração e desaceleração.

Stability Condition Based Sliding Mode Modulators for Multilevel Power Converters

Sliding mode controllers for power converters usually employ hysteresis comparators to directly generate the power semiconductors switching states. This paper presents a new sliding mode modulator based on the direct implementation of the sliding mode stability condition, which for multilevel power converters shows advantages, as branch equalized switching frequencies and less distortion on the ac currents when operating near the rated converter power. The new sliding mode multilevel modulator is used to control a three-phase multilevel converter, operated as a reactive power compensator (STATCOM), implementing the stability condition in a digital signal processing system. The performance of this new sliding mode modulator is compared with a multilevel modulator based on hysteresis comparators. Simulation and experimental results are presented in order to highlight the system operation and control robustness.

Measurement of Photo Capacitance in Amorphous Silicon Photodiodes

This paper discusses the photodiode capacitance dependence on imposed light and applied voltage using different devices. The first device is a double amorphous silicon pin-pin photodiode; the second one a crystalline pin diode and the last one a single pin amorphous silicon diode. Double amorphous silicon diodes can be used as (de)multiplexer devices for optical communications. For short range applications, using plastic optical fibres, the WDM (wavelength-division multiplexing) technique can be used in the visible light range to encode multiple signals. Experimental results consist on measurements of the photodiode capacitance under different conditions of imposed light and applied voltage. The relation between the capacitive effects of the double diode and the quality of the semiconductor internal junction will be analysed. The dynamics of charge accumulations will be measured when the photodiode is illuminated by a pulsed monochromatic light.

Efficient cyclohexane oxidation with hydrogen peroxide catalysed by a C-scorpionate iron(II) complex immobilized on desilicated MOR zeolite

The hydrotris(pyrazol-1-yl)methane iron(II) complex [FeCl2{eta(3)-HC(pz)(3)}] (Fe, pz = pyrazol-1-yl) immobilized on commercial (MOR) or desilicated (MOR-D) zeolite, catalyses the oxidation of cyclohexane with hydrogen peroxide to cyclohexanol and cyclohexanone, under mild conditions. MOR-D/Fe (desilicated zeolite supported [FeCl2{eta(3)-HC(pz)(3)}] complex) provides an outstanding catalytic activity (TON up to 2.90 x 10(3)) with the concomitant overall yield of 38%, and can be easy recovered and reused. The MOR or MOR-D supported hydrotris(pyrazol-1-yl)methane iron(II) complex (MOR/Fe and MOR-D/Fe, respectively) was characterized by X-ray powder diffraction, ICP-AES, and TEM studies as well as by IR spectroscopy and N-2 adsorption at -196 degrees C. The catalytic operational conditions (e.g., reaction time, type and amount of oxidant, presence of acid and type of solvent) were optimized. (C) 2013 Elsevier B.V. All rights reserved.

Exposure to fungi in dockers

Several activities are ensured by dockers increase occupational exposure to several risk factors. being one of them the fungal burden from the load. In this study we aim at characterizing fungal contamination in one warehouse that storage sugar cane from a ship, and also in one crane cabinet that unload the same sugar cane from the ship. Air samples were collected from the warehouse and from inside the crane cabinet. An outdoor sample was also collected, from each sampling site, and regarding as reference. Sampling volume was selected depending in the contamination expected and the air samples were collect through an impaction method in a flow rate of 140 L/min onto malt extract agar (MEA) supplemented with chloramphenicol (0.05%), using the Millipore air Tester (Millipore). Surfaces samples from the warehouse were collected by swabbing the surfaces of the same indoor sites, using a 10 by 10cm square stencil according to the International Standard ISO 18593 (2004). The obtained swabs were then plated onto MEA. All the collected samples were incubated at 27ºC for 5 to 7 days. After laboratory processing and incubation of the collected samples, quantitative (colony-forming units - CFU/m3 and CFU/m2) and qualitative results were obtained with identification of the isolated fungal species. Aspergillus fumigatus present the highest fungal load and WHO guideline was overcome in both indoor sampling sites. The results obtained in this study highlight the need to know better the exposure burden from dockers, and specifically to fungi contamination.

A fluorescente bicyclic Calix[4] Arene-Oxacyclophane with planar chirality: Resolution, chiroptical, properties, and absolute configuration.

A new inherently chiral calix[4]arene ICC 1 has been disclosed. The dissymmetry of 1 is generated from a chirality plane in the quinol moiety of a 1,3-bridged bicyclic calix[4]arene. ICC 1 has been resolved by enantioselective HPLC, and the chiroptical properties of both isolated antipodes (pS)-1 and (pR)-1 confirm their enantiomeric nature. The absolute configuration of the (pS)-1/(pR)-1 enantiomeric pair was established through time-dependent density functional theory (TDDFT) calculations of electronic circular dichroism (CD) spectra. (C) 2014 Elsevier Ltd. All rights reserved.

Resistividade elétrica e permeabilidade de BAC com incorporação de cinzas volantes e fíler calcário

A resistividade elétrica é uma propriedade associada tanto a características físicas como químicas do betão, permitindo avaliar a maior ou menor dificuldade de penetração dos agentes agressivos no seu interior antes de iniciado o processo de despassivação e consequente corrosão das armaduras. Este trabalho aborda as propriedades de permeabilidade, correlacionando-as com a resistividade elétrica, de betão auto-compactável (BAC) com diferentes tipos e quantidades de adições. Para esse efeito, foram produzidas misturas binárias e ternárias de BAC com recurso a cinzas volantes (CV) e fíler calcário (FC). Produziu-se um total de 11 misturas auto-compactáveis: uma só com cimento (C); três com C+CV em 30, 60 e 70% de substituição; três com C+FC em 30, 60 e 70% de substituição; quatro com C+CV+FC em combinações de 10-20, 20-10, 20-40 e 40-20% de substituição respetivamente; e, por fim, quatro misturas de acordo com as especificações LNEC E 464 em referência à norma NP EN 206-1. A avaliação da permeabilidade dos betões produzidos foi feita através do ensaio de determinação da absorção de água por capilaridade de acordo com a especificação LNEC E 393. A resistividade elétrica foi avaliada recorrendo à proposta de norma europeia apresentada pelo EU-Project CHLORTEST (EU funded research Project under 5FP GROWTH programme) e com base na recomendação técnica RILEM TC-154 EMC. Os resultados obtidos indicam que as propriedades de permeabilidade do BAC são fortemente condicionadas pelo tipo e pela quantidade de adições utilizadas, constatando-se que a adição de CV melhora significativamente algumas das propriedades estudadas principalmente em idades mais avançadas.

Scaling law in Saddle-node bifurcations for one-dimensional maps: A complex variable approach

The study of transient dynamical phenomena near bifurcation thresholds has attracted the interest of many researchers due to the relevance of bifurcations in different physical or biological systems. In the context of saddle-node bifurcations, where two or more fixed points collide annihilating each other, it is known that the dynamics can suffer the so-called delayed transition. This phenomenon emerges when the system spends a lot of time before reaching the remaining stable equilibrium, found after the bifurcation, because of the presence of a saddle-remnant in phase space. Some works have analytically tackled this phenomenon, especially in time-continuous dynamical systems, showing that the time delay, tau, scales according to an inverse square-root power law, tau similar to (mu-mu (c) )(-1/2), as the bifurcation parameter mu, is driven further away from its critical value, mu (c) . In this work, we first characterize analytically this scaling law using complex variable techniques for a family of one-dimensional maps, called the normal form for the saddle-node bifurcation. We then apply our general analytic results to a single-species ecological model with harvesting given by a unimodal map, characterizing the delayed transition and the scaling law arising due to the constant of harvesting. For both analyzed systems, we show that the numerical results are in perfect agreement with the analytical solutions we are providing. The procedure presented in this work can be used to characterize the scaling laws of one-dimensional discrete dynamical systems with saddle-node bifurcations.

Algorithm-oriented design of efficient many-core architectures applied to dense matrix multiplication

Recent integrated circuit technologies have opened the possibility to design parallel architectures with hundreds of cores on a single chip. The design space of these parallel architectures is huge with many architectural options. Exploring the design space gets even more difficult if, beyond performance and area, we also consider extra metrics like performance and area efficiency, where the designer tries to design the architecture with the best performance per chip area and the best sustainable performance. In this paper we present an algorithm-oriented approach to design a many-core architecture. Instead of doing the design space exploration of the many core architecture based on the experimental execution results of a particular benchmark of algorithms, our approach is to make a formal analysis of the algorithms considering the main architectural aspects and to determine how each particular architectural aspect is related to the performance of the architecture when running an algorithm or set of algorithms. The architectural aspects considered include the number of cores, the local memory available in each core, the communication bandwidth between the many-core architecture and the external memory and the memory hierarchy. To exemplify the approach we did a theoretical analysis of a dense matrix multiplication algorithm and determined an equation that relates the number of execution cycles with the architectural parameters. Based on this equation a many-core architecture has been designed. The results obtained indicate that a 100 mm(2) integrated circuit design of the proposed architecture, using a 65 nm technology, is able to achieve 464 GFLOPs (double precision floating-point) for a memory bandwidth of 16 GB/s. This corresponds to a performance efficiency of 71 %. Considering a 45 nm technology, a 100 mm(2) chip attains 833 GFLOPs which corresponds to 84 % of peak performance These figures are better than those obtained by previous many-core architectures, except for the area efficiency which is limited by the lower memory bandwidth considered. The results achieved are also better than those of previous state-of-the-art many-cores architectures designed specifically to achieve high performance for matrix multiplication.