77 resultados para CIRCUIT BOARDS
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Characteristics of tunable wavelength pi'n/pin filters based on a-SiC:H multilayered stacked cells are studied both experimentally and theoretically. Results show that the device combines the demultiplexing operation with the simultaneous photodetection and self amplification of the signal. An algorithm to decode the multiplex signal is established. A capacitive active band-pass filter model is presented and supported by an electrical simulation of the state variable filter circuit. Experimental and simulated results show that the device acts as a state variable filter. It combines the properties of active high-pass and low-pass filter sections into a capacitive active band-pass filter using a changing capacitance to control the power delivered to the load.
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Passive films were grown in potentiodynamic mode, by cyclic voltammetry on AISI 316 and AISI 304 stainless steels. The composition of these films was investigated by X-ray photoelectron spectroscopy (XPS). The electrochemical behaviour and the chemical composition of the passive films formed by cyclic voltammetry were compared to those of films grown under natural conditions (by immersion at open circuit potential, OCP) in alkaline solutions simulating concrete. The study included the effect of pH of the electrolyte and the effect of the presence of chloride ions. The XPS results revealed important changes in the passive film composition, which becomes enriched in chromium and depleted in magnetite as the pH decreases. On the other hand, the presence of chlorides promotes a more oxidised passive layer. The XPS results also showed relevant differences on the composition of the oxide layers for the films formed under cyclic voltammetry and/or under OCP.
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The operation of generalized Marx-type solid-state bipolar modulators is discussed and compared with simplified Marx-derived circuits, to evaluate their capability to deal with various load conditions. A comparative analysis on the number of switches per cell, fiber optic trigger count, losses, and switch hold-off voltages has been made. A circuit topology is obtained as a compromise in terms of operating performance, trigger simplicity, and switching losses. A five-stage laboratory prototype of this circuit has been assembled using 1200 V insulated gate bipolar transistors (IGBTs) and diodes, operating with 1000 V dc input voltage and 1 kHz frequency, giving 5 kV bipolar pulses, with 2.5 mu s pulse width and 5 mu s relaxation time into resistive, capacitive, and inductive loads.
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Dissertação para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e eletrónica Industrial
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Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial
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Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia Mecânica
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Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia Civil na Área de Especialização de Edificações
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Dissertação para obtenção do grau de Mestre em Engenharia de Eletrónica e Computadores
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Resumo I (Prática Pedagógica) - O Estágio do Ensino Especializado realizado no presente ano lectivo foi elaborado na Academia de Música de Lisboa em três turmas. Vários foram os desafios encontrados no decorrer do ano lectivo, como por exemplo a instabilidade das turmas, a falta do quadro na sala em algumas aulas e a pouca experiência anterior na área de docência. A realização deste estágio permitiu experimentar actividades e estratégias aprendidas nas disciplinas do mestrado e estimulou uma atitude de reflexão regular sobre as escolhas pedagógicas elaboradas e sobre a resposta dos alunos. Também o feedback dos professores da Unidade Curricular de Didáctica do Ensino Especializado foi essencial na consciencialização de aspectos que teriam que ser mudados na minha abordagem do ensino: fazer actividades mais formativas e menos avaliativas, dar mais feedback, não avançar para outro nível enquanto uma tarefa ainda não estiver consolidada, não modificar as instruções tão rapidamente, ter cuidado com a apresentação visual das células rítmicas e pensar em soluções para quando os alunos estão cansados. Foi também importante reflectir sobre os planos de aula realizados ao longo do ano e sobre o que não seria realizado da mesma forma, nomeadamente na introdução de células rítmicas, introdução de funções harmónicas e cadências. Durante este ano foi feito um esforço para melhorar estes aspectos, no entanto ainda não foi possível implementar todas as mudanças. De qualquer modo, esta reflexão é um bom ponto de partida para o planeamento do próximo ano e um exemplo da atitude que deve acompanhar-me durante toda a minha actividade enquanto docente.
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Recent integrated circuit technologies have opened the possibility to design parallel architectures with hundreds of cores on a single chip. The design space of these parallel architectures is huge with many architectural options. Exploring the design space gets even more difficult if, beyond performance and area, we also consider extra metrics like performance and area efficiency, where the designer tries to design the architecture with the best performance per chip area and the best sustainable performance. In this paper we present an algorithm-oriented approach to design a many-core architecture. Instead of doing the design space exploration of the many core architecture based on the experimental execution results of a particular benchmark of algorithms, our approach is to make a formal analysis of the algorithms considering the main architectural aspects and to determine how each particular architectural aspect is related to the performance of the architecture when running an algorithm or set of algorithms. The architectural aspects considered include the number of cores, the local memory available in each core, the communication bandwidth between the many-core architecture and the external memory and the memory hierarchy. To exemplify the approach we did a theoretical analysis of a dense matrix multiplication algorithm and determined an equation that relates the number of execution cycles with the architectural parameters. Based on this equation a many-core architecture has been designed. The results obtained indicate that a 100 mm(2) integrated circuit design of the proposed architecture, using a 65 nm technology, is able to achieve 464 GFLOPs (double precision floating-point) for a memory bandwidth of 16 GB/s. This corresponds to a performance efficiency of 71 %. Considering a 45 nm technology, a 100 mm(2) chip attains 833 GFLOPs which corresponds to 84 % of peak performance These figures are better than those obtained by previous many-core architectures, except for the area efficiency which is limited by the lower memory bandwidth considered. The results achieved are also better than those of previous state-of-the-art many-cores architectures designed specifically to achieve high performance for matrix multiplication.
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Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial
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Dissertação para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial
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Dissertação para a obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial
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This paper is about a PV system connected to the electric grid by power electronic converters, using classical PI controller. The modelling for the converters emulates the association of a DC-DC boost with a two-level power inverter (TwLI) or three-level power inverter (ThLI) in order to follow the performance of a testing experimental system. Pulse width modulation (PWMo) by sliding mode control (SMCo) associated with space vector modulation (SVMo) is applied to the boost and the inverter. The PV system is described by the five parameters equivalent circuit. Parameter identification and simulation studies are performed for comparison with the testing experimental system.
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This paper focuses on a PV system linked to the electric grid by power electronic converters, identification of the five parameters modeling for photovoltaic systems and the assessment of the shading effect. Normally, the technical information for photovoltaic panels is too restricted to identify the five parameters. An undemanding heuristic method is used to find the five parameters for photovoltaic systems, requiring only the open circuit, maximum power, and short circuit data. The I- V and the P- V curves for a monocrystalline, polycrystalline and amorphous photovoltaic systems are computed from the parameters identification and validated by comparison with experimental ones. Also, the I- V and the P- V curves under the effect of partial shading are obtained from those parameters. The modeling for the converters emulates the association of a DC-DC boost with a two-level power inverter in order to follow the performance of a testing commercial inverter employed on an experimental system. © 2015 Elsevier Ltd.