40 resultados para Dipole array


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A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on a scalable, modular and completely configurable processing structure. This flexible structure not only allows to easily reconfigure the architecture to support different transform kernels, but it also permits its resizing to efficiently support transforms of different orders (e. g. order-4, order-8, order-16 and order-32). Consequently, not only is it highly suitable to realize high-performance multi-standard transform cores, but it also offers highly efficient implementations of specialized processing structures addressing only a reduced subset of transforms that are used by a specific video standard. The experimental results that were obtained by prototyping several configurations of this processing structure in a Xilinx Virtex-7 FPGA show the superior performance and hardware efficiency levels provided by the proposed unified architecture for the implementation of transform cores for the Advanced Video Coding (AVC), Audio Video coding Standard (AVS), VC-1 and High Efficiency Video Coding (HEVC) standards. In addition, such results also demonstrate the ability of this processing structure to realize multi-standard transform cores supporting all the standards mentioned above and that are capable of processing the 8k Ultra High Definition Television (UHDTV) video format (7,680 x 4,320 at 30 fps) in real time.

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This paper proposes a multifunctional architecture to implement field-programmable gate array (FPGA) controllers for power converters and presents a prototype for a pulsed power generator based on a solid-state Marx topology. The massively parallel nature of reconfigurable hardware platforms provides very high processing power and fast response times allowing the implementation of many subsystems in the same device. The prototype includes the controller, a failure detection system, an interface with a safety/emergency subsystem, a graphical user interface, and a virtual oscilloscope to visualize the generated pulse waveforms, using a single FPGA. The proposed architecture employs a modular design that can be easily adapted to other power converter topologies.

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We present a palaeomagnetic study on 38 lava flows and 20 dykes encompassing the past 1.3 Myr on S. Jorge Island (Azores ArchipelagoNorth Atlantic Ocean). The sections sampled in the southeastern and central/western parts of the island record reversed and normal polarities, respectively. They indicate a mean palaeomagnetic pole (81.3 degrees N, 160.7 degrees E, K= 33 and A95= 3.4 degrees) with a latitude shallower than that expected from Geocentric Axial Dipole assumption, suggesting an effect of non-dipolar components of the Earth magnetic field. Virtual Geomagnetic Poles of eight flows and two dykes closely follow the contemporaneous records of the Cobb Mountain Subchron (ODP/DSDP programs) and constrain the age transition from reversed to normal polarity at ca. 1.207 +/- 0.017 Ma. Volcano flank instabilities, probably related to dyke emplacement along an NNWSSE direction, led to southwestward tilting of the lava pile towards the sea. Two spatially and temporally distinct dyke systems have been recognized on the island. The eastern is dominated by NNWSSE trending dykes emplaced before the end of the Matuyama Chron, whereas in the central/western parts the eruptive fissures oriented WNWESE controlled the westward growth of the S. Jorge Island during the Brunhes Chron. Both directions are consistent with the present-day regional stress conditions deduced from plate kinematics and tectonomorphology and suggest the emplacement of dykes along pre-existing fractures. The distinct timing and location of each dyke system likely results from a slight shift of the magmatic source.

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This paper provides a review of antennas applied for indoor positioning or localization systems. The desired requirements of those antennas when integrated in anchor nodes (reference nodes) are discussed, according to different localization techniques and their performance. The described antennas will be subdivided into the following sections according to the nature of measurements: received signal strength (RSS), time of flight (ToF), and direction of arrival (DoA). This paper intends to provide a useful guide for antenna designers who are interested in developing suitable antennas for indoor localization systems.

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Relatório Final apresentado à Escola Superior de Educação de Lisboa para obtenção de grau de mestre em Ensino do 1º e 2º ciclo do Ensino Básico

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Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e telecomunicações

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Conventional film based X-ray imaging systems are being replaced by their digital equivalents. Different approaches are being followed by considering direct or indirect conversion, with the later technique dominating. The typical, indirect conversion, X-ray panel detector uses a phosphor for X-ray conversion coupled to a large area array of amorphous silicon based optical sensors and a couple of switching thin film transistors (TFT). The pixel information can then be readout by switching the correspondent line and column transistors, routing the signal to an external amplifier. In this work we follow an alternative approach, where the electrical switching performed by the TFT is replaced by optical scanning using a low power laser beam and a sensing/switching PINPIN structure, thus resulting in a simpler device. The optically active device is a PINPIN array, sharing both front and back electrical contacts, deposited over a glass substrate. During X-ray exposure, each sensing side photodiode collects photons generated by the scintillator screen (560 nm), charging its internal capacitance. Subsequently a laser beam (445 nm) scans the switching diodes (back side) retrieving the stored charge in a sequential way, reconstructing the image. In this paper we present recent work on the optoelectronic characterization of the PINPIN structure to be incorporated in the X-ray image sensor. The results from the optoelectronic characterization of the device and the dependence on scanning beam parameters are presented and discussed. Preliminary results of line scans are also presented. (C) 2014 Elsevier B.V. All rights reserved.

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We investigate the structural chain-to-ring transition at low temperature in a gas of dipolar hard spheres (DRS). Due to the weakening of entropic contribution, ring formation becomes noticeable when the effective dipole-dipole magnetic interaction increases, It results in the redistribution of particles from usually observed flexible chains into flexible rings. The concentration (rho) of DI-IS plays a crucial part in this transition: at a very low rho only chains and rings are observed, whereas even a slight increase of the volume fraction leads to the formation of branched or defect structures. As a result, the fraction of DHS aggregated in defect-free rings turns out to be a non-monotonic function of rho. The average ring size is found to be a slower increasing function of rho when compared Lo that of chains. Both theory and computer simulations confirm the dramatic influence of the ring formation on the rho-dependence of the initial magnetic susceptibility (chi) when the temperature decreases. The rings clue to their zero total dipole moment are irresponsive to a weak magnetic field and drive to the strong decrease of the initial magnetic susceptibility. (C) 2014 Elsevier B.V. All rights reserved.

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Dissertação para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial

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Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.