Implementação em hardware reconfigurável de método de separação de dados hiperespetrais

Relatório do Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e Telecomunicações

Sistema de reconhecimento de impressões digitais baseado em FPGA

Trabalho de Projeto para obtenção do grau de Mestre em Engenharia de Eletrónica e Telecomunicações

Many-core approach to 2D-DCT calculation using an FPGA

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e Telecomunicações

Action, reaction and protest by publishers in 1960s Portugal: books and other publications in the Catholic opposition

The authoritarian regime of the Portuguese Estado Novo (New State), the longest dictatorship in twentieth-century Western Europe, suffered one of its most serious threats during the late 1950s and the whole of the following decade. An array of events and dynamics of opposition to the regime and condemnation of the political and social situation in Portugal appeared at that time. One of the core groups that displayed their dissidence in the 1960s, with the awakening of their critical conscience, originated in Catholic sectors that rallied the laity and the clergy to express their disagreement or even break with the government of Salazar (and, later, Marcelo Caetano). This article aims to establish the role of print culture and, in particular, publishing in the opposition’s mobilisation of Catholics who criticised the Estado Novo. It will also closely examine the contribution of certain publishers to the formulation of the terms of this mobilisation, in publishing new authors and topics and creating new printed forums (e.g. periodicals) for discussion and reflection. The most detailed case will be that of the publishing house Livraria Moraes Editora, under the command of the publisher António Alçada Baptista.

Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs

A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on a scalable, modular and completely configurable processing structure. This flexible structure not only allows to easily reconfigure the architecture to support different transform kernels, but it also permits its resizing to efficiently support transforms of different orders (e. g. order-4, order-8, order-16 and order-32). Consequently, not only is it highly suitable to realize high-performance multi-standard transform cores, but it also offers highly efficient implementations of specialized processing structures addressing only a reduced subset of transforms that are used by a specific video standard. The experimental results that were obtained by prototyping several configurations of this processing structure in a Xilinx Virtex-7 FPGA show the superior performance and hardware efficiency levels provided by the proposed unified architecture for the implementation of transform cores for the Advanced Video Coding (AVC), Audio Video coding Standard (AVS), VC-1 and High Efficiency Video Coding (HEVC) standards. In addition, such results also demonstrate the ability of this processing structure to realize multi-standard transform cores supporting all the standards mentioned above and that are capable of processing the 8k Ultra High Definition Television (UHDTV) video format (7,680 x 4,320 at 30 fps) in real time.

Multifunctional controller architecture for sold-state marx modulator based on FPGA

This paper proposes a multifunctional architecture to implement field-programmable gate array (FPGA) controllers for power converters and presents a prototype for a pulsed power generator based on a solid-state Marx topology. The massively parallel nature of reconfigurable hardware platforms provides very high processing power and fast response times allowing the implementation of many subsystems in the same device. The prototype includes the controller, a failure detection system, an interface with a safety/emergency subsystem, a graphical user interface, and a virtual oscilloscope to visualize the generated pulse waveforms, using a single FPGA. The proposed architecture employs a modular design that can be easily adapted to other power converter topologies.

A Review of antenas for indoor positioning systems

This paper provides a review of antennas applied for indoor positioning or localization systems. The desired requirements of those antennas when integrated in anchor nodes (reference nodes) are discussed, according to different localization techniques and their performance. The described antennas will be subdivided into the following sections according to the nature of measurements: received signal strength (RSS), time of flight (ToF), and direction of arrival (DoA). This paper intends to provide a useful guide for antenna designers who are interested in developing suitable antennas for indoor localization systems.

O trabalho individual e o trabalho de grupo no processo de ensino-aprendizagem do estudo do meio no 1º Ciclo

Relatório Final apresentado à Escola Superior de Educação de Lisboa para obtenção de grau de mestre em Ensino do 1º e 2º ciclo do Ensino Básico

JPEG decoder implementation on FPGA using dynamic partial reconfiguration

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e telecomunicações

Avaliação do potencial eólico para geração de energia eléctrica

Trabalho Final de Mestrado para a obtenção do grau de Mestre em Engenharia Mecânica /Energia

PINPIN a-Si: H based structures for X-ray image detection using the laser scanning technique

Conventional film based X-ray imaging systems are being replaced by their digital equivalents. Different approaches are being followed by considering direct or indirect conversion, with the later technique dominating. The typical, indirect conversion, X-ray panel detector uses a phosphor for X-ray conversion coupled to a large area array of amorphous silicon based optical sensors and a couple of switching thin film transistors (TFT). The pixel information can then be readout by switching the correspondent line and column transistors, routing the signal to an external amplifier. In this work we follow an alternative approach, where the electrical switching performed by the TFT is replaced by optical scanning using a low power laser beam and a sensing/switching PINPIN structure, thus resulting in a simpler device. The optically active device is a PINPIN array, sharing both front and back electrical contacts, deposited over a glass substrate. During X-ray exposure, each sensing side photodiode collects photons generated by the scintillator screen (560 nm), charging its internal capacitance. Subsequently a laser beam (445 nm) scans the switching diodes (back side) retrieving the stored charge in a sequential way, reconstructing the image. In this paper we present recent work on the optoelectronic characterization of the PINPIN structure to be incorporated in the X-ray image sensor. The results from the optoelectronic characterization of the device and the dependence on scanning beam parameters are presented and discussed. Preliminary results of line scans are also presented. (C) 2014 Elsevier B.V. All rights reserved.

Analysis of sandwich beam structures using kriging based higher order models

Functionally graded composite materials can provide continuously varying properties, which distribution can vary according to a specific location within the composite. More frequently, functionally graded materials consider a through thickness variation law, which can be more or less smoother, possessing however an important characteristic which is the continuous properties variation profiles, which eliminate the abrupt stresses discontinuities found on laminated composites. This study aims to analyze the transient dynamic behavior of sandwich structures, having a metallic core and functionally graded outer layers. To this purpose, the properties of the particulate composite metal-ceramic outer layers, are estimated using Mod-Tanaka scheme and the dynamic analyses considers first order and higher order shear deformation theories implemented though kriging finite element method. The transient dynamic response of these structures is carried out through Bossak-Newmark method. The illustrative cases presented in this work, consider the influence of the shape functions interpolation domain, the properties through-thickness distribution, the influence of considering different materials, aspect ratios and boundary conditions. (C) 2014 Elsevier Ltd. All rights reserved.

Controlo de conversores de potência genéricos por FPGA

Dissertação para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e Eletrónica Industrial

Otimização de placas compósitas laminadas utilizando redes neuronais e enxames de partículas

Trabalho Final de mestrado para obtenção do grau de Mestre em engenharia Mecância

A many-core co-processor for embedded parallel computing on FPGA

Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower resource utilization. In this paper, we propose a configurable many-core architecture to serve as a co-processor for high-performance embedded computing on Field-Programmable Gate Arrays. The architecture consists of an array of configurable simple cores with support for floating-point operations interconnected with a configurable interconnection network. For each core it is possible to configure the size of the internal memory, the supported operations and number of interfacing ports. The architecture was tested in a ZYNQ-7020 FPGA in the execution of several parallel algorithms. The results show that the proposed many-core architecture achieves better performance than that achieved with a parallel generalpurpose processor and that up to 32 floating-point cores can be implemented in a ZYNQ-7020 SoC FPGA.