Transiting exoplanets from the CoRoT space mission XII. CoRoT-12b: a short-period low-density planet transiting a solar analog star

We report the discovery by the CoRoT satellite of a new transiting giant planet in a 2.83 days orbit about a V = 15.5 solar analog star (M(*) = 1.08 +/- 0.08 M(circle dot), R(*) = 1.1 +/- 0.1 R(circle dot), T(eff) = 5675 +/- 80 K). This new planet, CoRoT-12b, has a mass of 0.92 +/- 0.07 M(Jup) and a radius of 1.44 +/- 0.13 R(Jup). Its low density can be explained by standard models for irradiated planets.

cis-Bis{1,1-dibenzyl-3-[(furan-2-yl)carbonyl]thioureato-kappa 2 O,S}nickel(II)

In the title compound, [Ni(C(20)H(17)N(2)O(2)S)(2)], the NiII atom is coordinated by the S and O atoms of two 1,1-dibenzyl-3-[(furan-2-yl)carbonyl]thioureate ligands in a distorted square-planar geometry. The two O and two S atoms are mutually cis to each other. The Ni-S and Ni-O bond lengths lie within the range of those found in related structures. The dihedral angle between the planes of the two chelating rings is 20.33 (6)degrees.

NMR analog of Bell's inequalities violation test

In this paper, we present an analog of Bell's inequalities violation test for N qubits to be performed in a nuclear magnetic resonance (NMR) quantum computer. This can be used to simulate or predict the results for different Bell's inequality tests, with distinct configurations and a larger number of qubits. To demonstrate our scheme, we implemented a simulation of the violation of the Clauser, Horne, Shimony and Holt (CHSH) inequality using a two-qubit NMR system and compared the results to those of a photon experiment. The experimental results are well described by the quantum mechanics theory and a local realistic hidden variables model (LRHVM) that was specifically developed for NMR. That is why we refer to this experiment as a simulation of Bell's inequality violation. Our result shows explicitly how the two theories can be compatible with each other due to the detection loophole. In the last part of this work, we discuss the possibility of testing some fundamental features of quantum mechanics using NMR with highly polarized spins, where a strong discrepancy between quantum mechanics and hidden variables models can be expected.

Bis(tetraphenylphosphonium) tris[N-(methylsulfonyl)dithiocarbimato(2-)-kappa(2)S,S ']stannate(IV)

In the title complex, (C(24)H(20)P)(2)[Sn(C(2)H(3)NO(2)S(3))(3)], the Sn(IV) atom is coordinated by three N-(methylsulfonyl) dithiocarbimate bidentate ligands through the anionic S atoms in a slightly distorted octahedral coordination geometry. There is one half-molecule in the asymmetric unit; the complex is located on a crystallographic twofold rotation axis passing through the cation and bisecting one of the (non-symmetric) ligands, which appears thus disordered over two sites of equal occupancy. In the crystal structure, weak intermolecular C-H center dot center dot center dot O and C-H center dot center dot center dot S interactions contribute to the packing stabilization.

cis-Bis[1,1-dibenzyl-3-(furan-2-ylcarbonyl)thioureato-kappa(2)O,S]copper(II)

In the title compound, [Cu(C(20)H(17)N(2)O(2)S)(2)], the Cu(II) atom is coordinated by the S and O atoms of two 1,1-dibenzyl-3-(furan-2-ylcarbonyl)thioureate ligands in a distorted square-planar geometry. The two O and two S atoms are mutually cis to each other. The Cu-S and Cu-O bond lengths lie within the ranges of those found in related structures. The dihedral angle between the planes of the two chelating rings is 26.15 (6)degrees.

cis-Bis[N-(2-furoyl)-N ',N '-diphenylthioureato-kappa(2)O,S]nickel(II)

In the title compound, [Ni(C(18)H(13)N(2)O(2)S)(2)], the Ni(II) atom is coordinated by the S and O atoms of two N-furoyl-N ',N '-diphenylthioureate ligands in a slightly distorted squareplanar coordination geometry. The two O and two S atoms are cis to each other.

cis-bis(N-benzoyl-N ',N '-dibenzylthio-ureato-kappa O-2,S)nickel(II)

In the title compound, [Ni(C22H19N2OS)(2)], the Ni-II atom is coordinated by the S and O atoms of two N-benzoyl-N',N'-dibenzylthioureate ligands in a slightly distorted square-planar geometry. The two O atoms are cis, as are the two S atoms.

3,3-Bis[(4-chlorophenyl)sulfanyl]-1-methylpiperidin-2-one

The piperidone ring in the title compound, C(18)H(17)Cl(2)NOS(2), has a distorted half-chair conformation. The S-bound benzene rings are approximately perpendicular to and splayed out of the mean plane through the piperidone ring [dihedral angles = 71.86 (13) and 46.94 (11)degrees]. In the crystal, C-H center dot center dot center dot O interactions link the molecules into [010] supramolecular chains with a helical topology. C-H center dot center dot center dot Cl and C-H center dot center dot center dot pi interactions are also present.

5-Methyl-2,4-bis(methylsulfanyl)tricyclo[6.2.1.0(2,7)]undeca-4,9-diene-3,6-dione

The structure analysis of the title compound, C(14)H(16)O(2)S(2), shows the SMe and H atoms of the bond linking the six-membered rings to be syn and also to be syn to the bridgehead -CH(2)- group. Each of the five-membered rings adopts an envelope conformation at the bridgehead -CH(2)- group. The dione-substituted ring adopts a folded conformation about the 1,4-C center dot center dot center dot C vector, with the ketone groups lying to one side. The cyclohexene ring adopts a boat conformation.

Electrochemical study of modified non-functional bis-silane layers on Al alloy 2024-T3

In the last few years great efforts have been made in order to find and to develop environmentally friendly substitutes for Cr6+ pre-treatments applied on aluminium alloys used in the aircraft industry. Among the potential substitutes, silane layers have attracted considerable interest from researchers and from the industry. The present work investigates the anti-corrosion behaviour of (bis-1, 2-(triethoxysilyl) ethane (BTSE)) silane layers modified with Ce ions and/or silica nanoparticles applied on Al alloy 2024-T3 substrates. The corrosion behaviour was investigated in 0.1 M NaCl solution via d.c. polarization and electrochemical impedance spectroscopy (EIS). Contact angle measurements and XPS were used to assess information on the chemistry of the silane pre-treated surfaces. The results have shown that the introduction of additives improves the corrosion protection properties of the silane layer. (c) 2008 Elsevier Ltd. All rights reserved.

Trapezoidal SOI FinFET analog parameters` dependence on cross-section shape

The trapezium is often a better approximation for the FinFET cross-section shape, rather than the design-intended rectangle. The frequent width variations along the vertical direction, caused by the etching process that is used for fin definition, may imply in inclined sidewalls and the inclination angles can vary in a significant range. These geometric variations may cause some important changes in the device electrical characteristics. This work analyzes the influence of the FinFET sidewall inclination angle on some relevant parameters for analog design, such as threshold voltage, output conductance, transconductance, intrinsic voltage gain (A V), gate capacitance and unit-gain frequency, through 3D numeric simulation. The intrinsic gain is affected by alterations in transconductance and output conductance. The results show that both parameters depend on the shape, but in different ways. Transconductance depends mainly on the sidewall inclination angle and the fixed average fin width, whereas the output conductance depends mainly on the average fin width and is weakly dependent on the sidewall inclination angle. The simulation results also show that higher voltage gains are obtained for smaller average fin widths with inclination angles that correspond to inverted trapeziums, i.e. for shapes where the channel width is larger at the top than at the transistor base because of the higher attained transconductance. When the channel top is thinner than the base, the transconductance degradation affects the intrinsic voltage gain. The total gate capacitances also present behavior dependent on the sidewall angle, with higher values for inverted trapezium shapes and, as a consequence, lower unit-gain frequencies.

Cryogenic operation of FinFETs aiming at analog applications

FinFETs are recognized as promising candidates for the CMOS nanometer era. In this paper the most recent results for cryogenic operation of FinFETs will be demonstrated with special emphasis on analog applications. Threshold voltage, subthreshold slope and carrier mobility will be studied. Also some important figures of merit for analog circuit operation as for readout electronics, such as transconductance, output conductance and intrinsic voltage gain will be covered. It is demonstrated that the threshold voltage of undoped narrow FinFETs is less temperature-dependent than for a planar single-gate device with similar doping concentration. The temperature reduction improves the transconductance over drain current ratio in any operational region. On the other hand, the output conductance is degraded when the temperature is reduced. The combination of these effects shows that the intrinsic gain of a L = 90 nm FinFET is degraded by 2 dB when the temperature reduces from 300 K to 100 K. (C) 2009 Elsevier Ltd. All rights reserved.

Influence of the sidewall crystal orientation, HfSiO nitridation and TiN metal gate thickness on n-MuGFETs under analog operation

This work characterizes the analog performance of SOI n-MuGFETs with HfSiO gate dielectric and TiN metal gate with respect to the influence of the high-k post-nitridation. TiN thickness and device rotation. A thinner TiN metal gate is found favorable for improved analog characteristics showing an increase in intrinsic voltage gain. The devices where the high-k material is subjected to a nitridation step indicated a degradation of the Early voltage (V(EA)) values which resulted in a lower voltage gain. The 45 degrees rotated devices have a smaller V(EA) than the standard ones when a HfSiO dielectric is used. However, the higher transconductance of these devices, due to the increased mobility in the (1 0 0) sidewall orientation, compensates this V(EA) degradation of the voltage gain, keeping it nearly equal to the voltage gain values of the standard devices. (C) 2011 Elsevier Ltd. All rights reserved.

Analog performance of standard and strained triple-gate silicon-on-insulator nFinFETs

This work shows a comparison between the analog performance of standard and strained Si n-type triple-gate FinFETs with high-K dielectrics and TiN gate material. Different channel lengths and fin widths are studied. It is demonstrated that both standard and strained FinFETs with short channel length and narrow fins have similar analog properties, whereas the increase of the channel length degrades the early voltage of the strained devices, consequently decreasing the device intrinsic voltage gain with respect to standard ones. Narrow strained FinFETs with long channel show a degradation of the Early voltage if compared to standard ones suggesting that strained devices are more subjected to the channel length modulation effect. (C) 2008 Elsevier Ltd. All rights reserved.

Junctionless Multiple-Gate Transistors for Analog Applications

This paper presents the evaluation of the analog properties of nMOS junctionless (JL) multigate transistors, comparing their performance with those exhibited by inversion-mode (IM) trigate devices of similar dimensions. The study has been performed for devices operating in saturation as single-transistor amplifiers, and we have considered the dependence of the analog properties on fin width W(fin) and temperature T. Furthermore, this paper aims at providing a physical insight into the analog parameters of JL transistors. For that, in addition to device characterization, 3-D device simulations were performed. It is shown that, depending on gate voltage, JL devices can present both larger Early voltage V(EA) and larger intrinsic voltage gain A(V) than IM devices of similar dimensions. In addition, V(EA) and A(V) are always improved in JL devices when the temperature is increased, whereas they present a maximum value around room temperature for IM transistors.