Inexact-aware architecture design for ultra-low power bio-signal analysis

This study introduces an inexact, but ultra-low power, computing architecture devoted to the embedded analysis of bio-signals. The platform operates at extremely low voltage supply levels to minimise energy consumption. In this scenario, the reliability of static RAM (SRAM) memories cannot be guaranteed when using conventional 6-transistor implementations. While error correction codes and dedicated SRAM implementations can ensure correct operations in this near-threshold regime, they incur in significant area and energy overheads, and should therefore be employed judiciously. Herein, the authors propose a novel scheme to design inexact computing architectures that selectively protects memory regions based on their significance, i.e. their impact on the end-to-end quality of service, as dictated by the bio-signal application characteristics. The authors illustrate their scheme on an industrial benchmark application performing the power spectrum analysis of electrocardiograms. Experimental evidence showcases that a significance-based memory protection approach leads to a small degradation in the output quality with respect to an exact implementation, while resulting in substantial energy gains, both in the memory and the processing subsystem.

Special issue on design and programming of signal processors for multimedia communication:Special issue on design and programming of signal processors for multimedia communication

The technical challenges in the design and programming of signal processors for multimedia communication are discussed. The development of terminal equipment to meet such demand presents a significant technical challenge, considering that it is highly desirable that the equipment be cost effective, power efficient, versatile, and extensible for future upgrades. The main challenges in the design and programming of signal processors for multimedia communication are, general-purpose signal processor design, application-specific signal processor design, operating systems and programming support and application programming. The size of FFT is programmable so that it can be used for various OFDM-based communication systems, such as digital audio broadcasting (DAB), digital video broadcasting-terrestrial (DVB-T) and digital video broadcasting-handheld (DVB-H). The clustered architecture design and distributed ping-pong register files in the PAC DSP raise new challenges of code generation.

Process variation tolerant low power DCT architecture

2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive voltage scaling by exploiting the fact that not all intermediate computations are equally important in a DCT system to obtain "good" image quality with Peak Signal to Noise Ratio(PSNR) > 30 dB. This observation has led us to propose a DCT architecture where the signal paths that are less contributive to PSNR improvement are designed to be longer than the paths that are more contributive to PSNR improvement. It should also be noted that robustness with respect to parameter variations and low power operation typically impose contradictory requirements in terms of architecture design. However, the proposed architecture lends itself to aggressive voltage scaling for low-power dissipation even under process parameter variations. Under a scaled supply voltage and/or variations in process parameters, any possible delay errors would only appear from the long paths that are less contributive towards PSNR improvement, providing large improvement in power dissipation with small PSNR degradation. Results show that even under large process variation and supply voltage scaling (0.8V), there is a gradual degradation of image quality with considerable power savings (62.8%) for the proposed architecture when compared to existing implementations in 70 nm process technology.

Free-space optoelectronic switching cores with MPLS for SANs over WDM ring networks

With increasing demands on storage devices in the modern communication environment, the storage area network (SAN) has evolved to provide a direct connection allowing these storage devices to be accessed efficiently. To optimize the performance of a SAN, a three-stage hybrid electronic/optical switching node architecture based on the concept of a MPLS label switching mechanism, aimed at serving as a multi-protocol label switching (MPLS) ingress label edge router (LER) for a SAN-enabled application, has been designed. New shutter-based free-space multi-channel optical switching cores are employed as the core switch fabric to solve the packet contention and switching path conflict problems. The system-level node architecture design constraints are evaluated through self-similar traffic sourced from real gigabit Ethernet network traces and storage systems. The extension performance of a SAN over a proposed WDM ring network, aimed at serving as an MPLS-enabled transport network, is also presented and demonstrated.

Designing for dementia : an assessment of the impact of the physical environment on wayfinding success for residents in long term care settings

It is acknowledged that one of the consequences of the ageing process is cognitive decline, which leads to an increase in the incidence of illnesses such as dementia. This has become ever more relevant due to the projected increase in the ageing demographic. Dementia affects visuo-spatial perception, causing difficulty with wayfinding, even during the early stages of the disease. The literature widely recognises the physical environment’s role in alleviating symptoms of dementia and improving quality of life for residents. It also identifies the lack of available housing options for older people with dementia and consequently the current stock is ill-equipped to provide adequate support.
Recent statistics indicate that 80% of those residing in nursing or residential care homes have some form of dementia or severe memory problems. The shift towards institutional care settings, the need for specialist support and care, places a greater impetus on the need for a person-centred approach to tackle issues related to wayfinding and dementia.
This thesis therefore aims to improve design for dementia in nursing and residential care settings in the context of Northern Ireland. This will be undertaken in order to provide a better understanding of how people with dementia experience the physical environment and to highlight features of the design that assist with wayfinding. Currently there are limited guidelines on design for dementia, meaning that many of these are theoretical, anecdotal and not definitive. Hence a greater verification to address the less recognised design issues is required. This is intended to ultimately improve quality of life, wellbeing, independence and uphold the dignity of people with dementia living in nursing or residential care homes.
The research design uses a mixed methods approach. A thorough preparation and consideration of ethical issues informed the methodology. The various facets were also trialled and piloted to identify any ethical, technological, methodological, data collection and analysis issues. The protocol was then amended to improve or resolve any of the aforementioned issues. Initially a questionnaire based on leading design recommendations was conducted with home managers. Semi-structured interviews were developed from this and conducted with staff and resident’s next of kin. An evidence-based approach was used to design a study which used ethnographic methods, including a wayfinding task. This followed a repeated measures design which would be used to actively engage residents with dementia in the research. Complementary to the wayfinding task, conversational and semi-structured interviews were used to promote dialogue and direct responses with the person with dementia. In addition to this, Space Syntax methodologies were used to examine the physical properties of the architectural layout. This was then cross-examined with interview responses and data from the wayfinding tasks.
A number of plan typologies were identified and were determined as synonymous with decision point types which needed to be made during the walks. The empirical work enabled the synthesis of environmental features which support wayfinding.
Results indicate that particular environmental features are associated with improved performance on the wayfinding tasks. By enhancing design for dementia, through identifying the attributes, challenges with wayfinding may be overcome and the benefits of the physical environment can be seen to promote wellbeing.
The implications of this work mean that the environmental features which have been highlighted from the project can be used to inform guidelines, thus adding to existing knowledge. Future work would involve the dissemination of this information and the potential for it to be made into design standards or regulations which champion design for dementia. These would increase awareness for designers and stakeholders undertaking new projects, extensions or refurbishments.
A person-centred, evidence-based design was emphasised throughout the project which guaranteed an in-depth study. There were limitations due to the available resources, time and funding. Future research would involve testing the identified environmental features within a specific environment to enable measured observation of improvements.

Street Space—North Street, Belfast

The Belfast city center is fractured, divided by motorways, parking lots, empty buildings, and big box stores. Its 19th-century heyday put it on the international map of textile production, which transformed and enriched its built structure. This tight architectural fabric was slowly destroyed in the 1940s by the Blitz, in the 1970s by road plans and “the troubles” and in the 1990s by large retail buildings. Few pedestrian streets traverse Belfast, and among them, most are recently-developed conduits for the passage of shoppers from one chain store to the next.Within this seemingly bleak urban landscape, there remain a few areas that offer a richer, more architecturally and socially diverse, more memory-laden conception of public space. Current redevelopment plans, however, threaten the mere existence of these few remaining historic streets in Belfast.This reality inspired the current project of one of the Masters in Architecture design units at Queen’s University Belfast. Our team (led by urban designer Michael Corr and myself) has been exploring North Street, one of the main arteries in Belfast City Center. Although North Street has a reputation for being run-down, derelict, and in need of redevelopment, it is one of the few intact 19th-century streets left in the area, and as such is worthy of study as an example of public space that is not strictly synonymous with commercial space.

Design and implementation of a field programmable CRC circuit architecture

The design and implementation of a programmable cyclic redundancy check (CRC) computation circuit architecture, suitable for deployment in network related system-on-chips (SoCs) is presented. The architecture has been designed to be field reprogrammable so that it is fully flexible in terms of the polynomial deployed and the input port width. The circuit includes an embedded configuration controller that has a low reconfiguration time and hardware cost. The circuit has been synthesised and mapped to 130-nm UMC standard cell [application-specific integrated circuit (ASIC)] technology and is capable of supporting line speeds of 5 Gb/s. © 2006 IEEE.

New FFT architecture and chip design for motion compensation based on phase correlation

Details of a new low power FFT processor for use in digital television applications are presented. This has been fabricated using a 0.6 µm CMOS technology and can perform a 64 point complex forward or inverse FFT on real-rime video at up to 18 Megasamples per second. It comprises 0.5 million transistors in a die area of 7.8×8 mm and dissipates 1 W. Its performance, in terms of computational rate per area per watt, is significantly higher than previously reported devices, leading to a cost-effective silicon solution for high quality video processing applications. This is the result of using a novel VLSI architecture which has been derived from a first principles factorisation of the DFT matrix and tailored to a direct silicon implementation.