Behaviour of Brent geese Branta bernicla hrota and wigeon Anas penelope feeding on intertidal Zostera spp

Mixed flocks of pale-bellied Brent geese (Branta bernicla hrota) and wigeon (Anas penelope L.) feeding on intertidal Zostera spp were studied during October 1993 with respect to tidal position, feeding method and duration, and competitive: interactions within and between species. Owing to many disturbance incidents affecting the use of the site by wildfowl, only complete data on flow tides were presented. Brent geese fed over a greater period of the tidal cycle than wigeon. Differences in feeding methods indicated that Brent geese exploited the rhizomes, which are energetically more profitable than the shoot on which wigeon fed. Aggressive interactions were recorded within species but there were no records of aggression between species. More subtle competition for space, however, may have occurred during feeding. Brent geese could reach Zostera spp For a short period after increasing depth of water prevented access by wigeon. However, individual wigeon were observed foraging near feeding Brent geese, picking up the scraps oi material discarded by the latter, and small numbers of wigeon may benefit from the presence of the geese. These benefits for some individual wigeon are not considered to compensate for the disadvantages to the latter species population as a whole in feeding on poorer-quality food for a shorter period of the tidal cycle. This disadvantage is likely to have contributed to the decline in the wigeon population on Strangford Lough, Co. Down, while numbers of Brent geese have been maintained at a high level.

SYSTOLIC IIR FILTERS WITH BIT LEVEL PIPELINING.

A novel bit-level systolic array architecture for implementing first-order IIR filter sections is presented. A latency of only two clock cycles is achieved by using a radix-4 redundant number representation, performing the recursive computation most-significant-digit first, and feeding back each digit of the result as soon as it is available.

Bit-level systolic arrays for IIR filtering.

A novel bit-level systolic array architecture for implementing IIR (infinite-impulse response) filter sections is presented. A first-order section achieves a latency of only two clock cycles by using a radix-2 redundant number representation, performing the recursive computation most significant digit first, and feeding back each digit of the result as soon as it is available. The design is extended to produce a building block from which second- and higher-order sections can be connected.