FAULT-TOLERANT ALGORITHM FOR HIGH-AVAILABILITY AND WAFER SCALE SYSTEMS.

In this paper, the authors have presented one approach to configuring a Wafer-Scale Integration Chip. The approach described is called the 'WINNER', in which bus channels and an external controller for configuring the working processors are not required. In addition, the technique is applicable to high availability systems constructed using conventional methods. The technique can also be extended to arrays of arbitrary size and with any degree of fault tolerance simply by using an appropriate number of cells.

YIELD ENHANCEMENT OF BIT LEVEL SYSTOLIC ARRAY CHIPS USING FAULT TOLERANT TECHNIQUES.

Methods by which bit level systolic array chips can be made fault tolerant are discussed briefly. Using a simple analysis based on both Poisson and Bose-Einstein statistics authors demonstrate that such techniques can be used to obtain significant yield enhancement. Alternatively, the dimensions of an array can be increased considerably for the same initial (nonfault tolerant) chip yield.

The design of a navigation guidance and control system for an unmanned surface vehicle for environmental monitoring

Maintaining the ecosystem is one of the main concerns in this modern age. With the fear of ever-increasing global warming, the UK is one of the key players to participate actively in taking measures to slow down at least its phenomenal rate. As an ingredient to this process, the Springer vehicle was designed and developed for environmental monitoring and pollutant tracking. This special issue paper highlighted the Springer hardware and software architecture including various navigational sensors, a speed controller, and an environmental monitoring unit. In addition, details regarding the modelling of the vessel were outlined based mainly on experimental data. The formulation of a fault tolerant multi-sensor data fusion technique was also presented. Moreover, control strategy based on a linear quadratic Gaussian controller was developed and simulated on the Springer model.
Gaussian controller is developed and simulated on the Springer model.

Realizing Accelerated Cost-Effective Distributed RAID

The exponential growth in user and application data entails new means for providing fault tolerance and protection against data loss. High Performance Com- puting (HPC) storage systems, which are at the forefront of handling the data del- uge, typically employ hardware RAID at the backend. However, such solutions are costly, do not ensure end-to-end data integrity, and can become a bottleneck during data reconstruction. In this paper, we design an innovative solution to achieve a flex- ible, fault-tolerant, and high-performance RAID-6 solution for a parallel file system (PFS). Our system utilizes low-cost, strategically placed GPUs — both on the client and server sides — to accelerate parity computation. In contrast to hardware-based approaches, we provide full control over the size, length and location of a RAID array on a per file basis, end-to-end data integrity checking, and parallelization of RAID array reconstruction. We have deployed our system in conjunction with the widely-used Lustre PFS, and show that our approach is feasible and imposes ac- ceptable overhead.

HIGH SPEED CMOS/SOS IMPLEMENTATION OF A BIT LEVEL SYSTOLIC CORRELATOR.

The fabrication and performance of the first bit-level systolic correlator array is described. The application of systolic array concepts at the bit level provides a simple and extremely powerful method for implementing high-performance digital processing functions. The resulting structure is highly regular, facilitating yield enhancement through fault-tolerant redundancy techniques and therefore ideally suited to implementation as a VLSI chip. The CMOS/SOS chip operates at 35 MHz, is fully cascadable and exhibits 64-stage correlation for 1-bit reference and 4-bit data. 7 refs.

DEX: self-healing expanders

Fault Diagnosis in Internal Combustion Engines Using Nonlinear Multivariate Statistics

This paper presents a statistical-based fault diagnosis scheme for application to internal combustion engines. The scheme relies on an identified model that describes the relationships between a set of recorded engine variables using principal component analysis (PCA). Since combustion cycles are complex in nature and produce nonlinear relationships between the recorded engine variables, the paper proposes the use of nonlinear PCA (NLPCA). The paper further justifies the use of NLPCA by comparing the model accuracy of the NLPCA model with that of a linear PCA model. A new nonlinear variable reconstruction algorithm and bivariate scatter plots are proposed for fault isolation, following the application of NLPCA. The proposed technique allows the diagnosis of different fault types under steady-state operating conditions. More precisely, nonlinear variable reconstruction can remove the fault signature from the recorded engine data, which allows the identification and isolation of the root cause of abnormal engine behaviour. The paper shows that this can lead to (i) an enhanced identification of potential root causes of abnormal events and (ii) the masking of faulty sensor readings. The effectiveness of the enhanced NLPCA based monitoring scheme is illustrated by its application to a sensor fault and a process fault. The sensor fault relates to a drift in the fuel flow reading, whilst the process fault relates to a partial blockage of the intercooler. These faults are introduced to a Volkswagen TDI 1.9 Litre diesel engine mounted on an experimental engine test bench facility.

Feasibility of online collaborative voltage stability control of power systems

This paper presents the results of feasibility study of a novel concept of power system on-line collaborative voltage stability control. The proposal of the on-line collaboration between power system controllers is to enhance their overall performance and efficiency to cope with the increasing operational uncertainty of modern power systems. In the paper, the framework of proposed on-line collaborative voltage stability control is firstly presented, which is based on the deployment of multi-agent systems and real-time communication for on-line collaborative control. Then two of the most important issues in implementing the proposed on-line collaborative voltage stability control are addressed: (1) Error-tolerant communication protocol for fast information exchange among multiple intelligent agents; (2) Deployment of multi-agent systems by using graph theory to implement power system post-emergency control. In the paper, the proposed on-line collaborative voltage stability control is tested in the example 10-machine 39-node New England power system. Results of feasibility study from simulation are given considering the low-probability power system cascading faults.