Tungsten Silicide Contacts to Polycrystalline Silicon and Silicon-Germanium Alloys

Novel CVD WSi2 technology with low series and contact resistance in SiGe HBTs was achieved. Specific contact resistance to Si1-xGex with 0

Germanium MOS Capacitors with Hafnium Dioxide and Silicon Dioxide Dielectrics

Germanium (Ge) does not grow a suitable oxide for MOS devices. The Ge/dielectric interface is of prime importance to the operation of photo-detectors and scaled MOSTs. Therefore there is a requirement for deposited or bonded dielectric materials. MOS capacitors have been formed on germanium substrates with three different dielectric materials. Firstly, a thermally grown and bonded silicon dioxide (SiO2) layer, secondly, SiO2 deposited by atmospheric pressure CVD ‘silox’, and thirdly a hafnium oxide (HfO2) high-k dielectric deposited by atomic layer deposition (ALD). Ge wafers used were p-type 1 0 0 2 O cm. C–V measurements have been made on all three types of capacitors to assess the interface quality. ALD HfO2 and silox both display acceptable C–V characteristics. Threshold voltage and maximum and minimum capacitance values closely match expected values found through calculation. However, the bonded SiO2 has non-ideal C–V characteristics, revealing the presence of a high density of interface states. A H2/N2 post metal anneal has a detrimental effect on C–V characteristics of HfO2 and silox dielectrics, causing a shift in the threshold voltage and rise in the minimum capacitance value. In the case of hafnium dioxide, capacitor properties can be improved by performing a plasma nitridation of the Ge surface prior to dielectric deposition.

Non-linear electronic transport in Pt nanowires deposited by focused ion beam

Electrical transport and structural properties of platinum nanowires, deposited using the focussed ion beam method have been investigated. Energy dispersive X-ray spectroscopy reveals metal-rich grains (atomic composition 31% Pt and 50% Ga) in a largely non-metallic matrix of C, O and Si. Resistivity measurements (15-300 K) reveal a negative temperature coefficient with the room-temperature resistivity 80-300 times higher than that of bulk Pt. Temperature dependent current-voltage characteristics exhibit non-linear behaviour in the entire range investigated. The conductance spectra indicate increasing non-linearity with decreasing temperature, reaching 4% at 15 K. The observed electrical behaviour is explained in terms of a model for inter-grain tunnelling in disordered media, a mechanism that is consistent with the strongly disordered nature of the nanowires observed in the structure and composition analysis.

Spontaneous spin polarization and electron localization in constrained geometries: The Wigner transition in nanowires

The Wigner transition in a jellium model of cylindrical nanowires has been investigated by density-functional computations using the local spin-density approximation. A wide range of background densities rho(b) has been explored from the nearly ideal metallic regime (r(s)=[3/4 pi rho(b)](1/3)=1) to the high correlation limit (r(s)=100). Computations have been performed using an unconstrained plane wave expansion for the Kohn-Sham orbitals and a large simulation cell with up to 480 electrons. The electron and spin distributions retain the cylindrical symmetry of the Hamiltonian at high density, while electron localization and spin polarization arise nearly simultaneously in low-density wires (r(s)similar to 30). At sufficiently low density (r(s)>= 40), the ground-state electron distribution is the superposition of well defined and nearly disjoint droplets, whose charge and spin densities integrate almost exactly to one electron and 1/2 mu(B), respectively. Droplets are arranged on radial shells and define a distorted lattice whose structure is intermediate between bcc and fcc. Dislocations and grain boundaries are apparent in the droplets' configuration found by our simulations. Our computations aim at modeling the behavior of experimental low-carried density systems made of lightly doped semiconductor nanostructures or conducting polymers.

Atomic layer deposition of hafnium oxide dielectrics on silicon and germanium substrates

Hafnium oxide films have been deposited at 250 °C on silicon and germanium substrates by atomic layer deposition (ALD), using tetrakis-ethylmethylamino hafnium (TEMAH) and water vapour as precursors in a modified Oxford Instruments PECVD system. Self-limiting monolayer growth has been verified, characterised by a growth rate of 0.082 nm/ cycle. Layer uniformity is approximately within ±1% of the mean value. MOS capacitors have been fabricated by evaporating aluminium electrodes. CV analysis has been used to determine the bulk and interface properties of the HfO 2, and their dependence on pre-clean schedule, deposition conditions and post-deposition annealing. The dielectric constant of the HfO 2 is typically 18. On silicon, best results are obtained when the HfO 2 is deposited on a chemically oxidised hydrophilic surface. On germanium, best results are obtained when the substrate is nitrided before HfO 2 deposition, using an in-situ nitrogen plasma treatment. © Springer Science+Business Media, LLC 2007.

Germanium on Sapphire By Wafer Bonding

This paper describes the creation of a germanium on sapphire platform, via wafer bonding technology, for system-on-a-chip applications. Similar thermal coefficients of expansion between germanium (5.8 x 10-6 K-1) and sapphire (5 x 10-6 K-1) make the bonding of germanium to sapphire a reality. Germanium directly bonded to sapphire results in microvoid generation during post bond annealing. Inclusion of an interface layer such as silicon dioxide layer by plasma enhanced chemical vapour deposition, prior to bonding, results in a microvoid free bond interface after annealing. Grinding and polishing of the subsequent germanium layer has been achieved leaving a thick germanium on sapphire (GeOS) substrate. Submicron GeOS layers have also been achieved with hydrogen/helium co-implantation and layer transfer. Circular geometry transistors exhibiting a field effect mobility of 890 cm2/V s have been fabricated onto the thick germanium on sapphire layer.

Germanium on sapphire

This paper explores the potential of germanium on sapphire (GeOS) wafers as a universal substrate for System on a Chip (SOC), mm wave integrated circuits (MMICs) and optical imagers. Ge has a lattice constant close to that of GaAs enabling epitaxial growth. Ge, GaAs and sapphire have relatively close temperature coefficients of expansion (TCE), enabling them to be combined without stress problems. Sapphire is transparent over the range 0.17 to 5.5 µm and has a very low loss tangent (a) for frequencies up to 72 GHz. Ge bonding to sapphire substrates has been investigated with regard to micro-voids and electrical quality of the Ge back interface. The advantages of a sapphire substrate for integrated inductors, coplanar waveguides and crosstalk suppression are also highlighted. MOS transistors have been fabricated on GeOS substrates, produced by the Smart-cut process, to illustrate the compatibility of the substrate with device processing. © 2008 World Scientific Publishing Company.