98 resultados para reactor cores


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The activity of a 5-wt% Cu/CeO2-x catalyst during preferential CO oxidation in hydrogen-rich gas mixtures was studied in a microchannel reactor. The CO concentration dropped from 1 vol.% to 10 ppm at a selectivity of 60%, at a temperature of 190 degrees C, and a weight hour space velocity (WHSV) of 55,000 cm(3) g(-1) h(-1). Both the CO concentration and the temperature increased when the WHSV was increased from 50,000 to 500,000 cm(3) g(-1) h(-1). An increase of the O-2 concentration from a 1.2 to 3 fold excess reduced the CO concentration to 10 ppm in a broad temperature interval of 50 degrees C at WHSVs up to 275,000 cm(3) g(-1) h(-1). The preferential CO oxidation could be carried out at higher flow rates and at higher selectivities in the microchannel reactor compared to a fixed-bed flow reactor. (C) 2008 Elsevier B.V. All rights reserved.

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The present work is focused on the demonstration of the advantages of miniaturized reactor systems which are essential for processes where potential for considerable heat transfer intensification exists as well as for kinetic studies of highly exothermic reactions at near-isothermal conditions. The heat transfer characteristics of four different cross-flow designs of a microstructured reactor/heat-exchanger (MRHE) were studied by CFD simulation using ammonia oxidation on a platinum catalyst as a model reaction. An appropriate distribution of the nitrogen flow used as a coolant can decrease drastically the axial temperature gradient in the reaction channels. In case of a microreactor made of a highly conductive material, the temperature non-uniformity in the reactor is strongly dependent on the distance between the reaction and cooling channels. Appropriate design of a single periodic reactor/heat-exchanger unit, combined with a non-uniform inlet coolant distribution, reduces the temperature gradients in the complete reactor to less than 4degreesC, even at conditions corresponding to an adiabatic temperature rise of about 1400degreesC, which are generally not accessible in conventional reactors because of the danger of runaway reactions. To obtain the required coolant flow distribution, an optimization study was performed to acquire the particular geometry of the inlet and outlet chambers in the microreactor/heat-exchanger. The predicted temperature profiles are in good agreement with experimental data from temperature sensors located along the reactant and coolant flows. The results demonstrate the clear potential of microstructured devices as reliable instruments for kinetic research as well as for proper heat management in the case of highly exothermic reactions. (C) 2002 Elsevier Science B.V. All rights reserved.

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The application of an aluminum-based microstructured reactor/heat-exchanger for measuring reaction kinetics in the explosive region is presented. Platinum-catalyzed ammonia oxidation was chosen as a test reaction to demonstrate the feasibility of the method. The reaction kinetics was investigated in a wide range of conditions [NH3 partial pressure: 0.03-0.20 atm, O-2 partial pressure: 0.10-0.88atm; reactant flow 2000-3000 cm(3) min(-1) (STP); temperature 240-360degreesC] over a supported Pt/Al2O3 catalyst (mass of Al2O3 layer in the reactor, 1.95 mg; Pt/Al molar ratio, 0.71; Pt dispersion, 20%). The maximum temperature non-uniformity in the microstructured reactor was ca. 5degreesC, even at conditions corresponding to an adiabatic temperature rise of 1400degreesC. Based on the data obtained, a previous kinetic model for ammonia oxidation was extended. The modified 13-step model describes the data in a considerably wider range of conditions including those with high ammonia loadings and high reaction temperatures. The results indicate the large potential of microstructured devices as reliable tools for kinetic research of highly exothermic reactions.

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Long-range strain fields associated with dislocation cores at an oxide interface are shown to be sufficient enough to create significant variations in the chemical composition around the core (Cottrell atmospheres). Such stress-assisted diffusion of cations towards the cores is proposed to significantly impact the properties of nanoscale functional devices. The figure shows a Z-contrast image of a single dislocation core at an oxide interface.

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With increasing demands on storage devices in the modern communication environment, the storage area network (SAN) has evolved to provide a direct connection allowing these storage devices to be accessed efficiently. To optimize the performance of a SAN, a three-stage hybrid electronic/optical switching node architecture based on the concept of a MPLS label switching mechanism, aimed at serving as a multi-protocol label switching (MPLS) ingress label edge router (LER) for a SAN-enabled application, has been designed. New shutter-based free-space multi-channel optical switching cores are employed as the core switch fabric to solve the packet contention and switching path conflict problems. The system-level node architecture design constraints are evaluated through self-similar traffic sourced from real gigabit Ethernet network traces and storage systems. The extension performance of a SAN over a proposed WDM ring network, aimed at serving as an MPLS-enabled transport network, is also presented and demonstrated.

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Acidity peaks in Greenland ice cores have been used as critical reference horizons for synchronizing ice core records, aiding the construction of a single Greenland Ice Core Chronology (GICC05) for the Holocene. Guided by GICC05, we examined sub-sections of three Greenland cores in the search for tephra from specific eruptions that might facilitate the linkage of ice core records, the dating of prehistoric tephras and the understanding of the eruptions. Here we report the identification of 14 horizons with tephra particles, including 11 that have not previously been reported from the North Atlantic region and that have the potential to be valuable isochrons. The positions of tephras whose major element data are consistent with ash from the Katmai AD 1912 and Öraefajökull AD 1362 eruptions confirm the annually resolved ice core chronology for the last 700 years. We provide a more refined date for the so-called “AD860B” tephra, a widespread isochron found across NW Europe, and present new evidence relating to the 17th century BC Thera/Aniakchak debate that shows N. American eruptions likely contributed to the acid signals at this time. Our results emphasize the variable spatial and temporal distributions of volcanic products in Greenland ice that call for a more cautious approach in the attribution of acid signals to specific eruptive events.

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Methods are presented for the rapid design of DSP ASICs based on the use of a series of hierarchical VHDL libraries which are portable across many silicon foundries. These allows complex DSP silicon systems to be developed in a small fraction of the time normally required. Resulting designs are highly competitive with those developed using more conventional methods. The approach is illustrated using several examples. These include ADPCM codecs, as well as DCT and FFT cores.

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Methods are presented for developing synthesizable FFT cores. These are based on a modular approach in which parameterized commutator and processor blocks are cascaded to implement the computations required in many important FFT signal flow graphs. In addition, it is shown how the use of a digital serial data organization can be used to produce systems that offer 100% processor utilization along with reductions in storage requirements. The approach has been used to create generators for the automated synthesis of FFT cores that are portable across a broad range of silicon technologies. Resulting chip designs are competitive with ones created using manual methods but with significant reductions in design times.

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Methods are presented for developing synthesizable FFT cores. These are based on a modular approach in which parameterizable blocks are cascaded to implement the computations required across a range of typical FFT signal flow graphs. The underlying architectural approach combines the use of a digital serial data organization with generic commutator blocks to produce systems that offer 100% processor utilization with storage requirements less than previous designs. The approach has been used to create generators for the automated synthesis of FFT cores that are portable across a broad range of silicon technologies. Resulting chip designs are competitive with manual methods but with significant reductions in design times.