Learning soft computing control strategies in a modular neural network architecture

Modelling and control of nonlinear dynamical systems is a challenging problem since the dynamics of such systems change over their parameter space. Conventional methodologies for designing nonlinear control laws, such as gain scheduling, are effective because the designer partitions the overall complex control into a number of simpler sub-tasks. This paper describes a new genetic algorithm based method for the design of a modular neural network (MNN) control architecture that learns such partitions of an overall complex control task. Here a chromosome represents both the structure and parameters of an individual neural network in the MNN controller and a hierarchical fuzzy approach is used to select the chromosomes required to accomplish a given control task. This new strategy is applied to the end-point tracking of a single-link flexible manipulator modelled from experimental data. Results show that the MNN controller is simple to design and produces superior performance compared to a single neural network (SNN) controller which is theoretically capable of achieving the desired trajectory. (C) 2003 Elsevier Ltd. All rights reserved.

Full Irish: New Architecture in Ireland

Full Irish New Architecture in Ireland profiles 16 firms in the Republic of Ireland and Northern Ireland including photographs, drawings and text. Its publisher, Princeton Architectural Press, has won numerous international awards for highest quality academic and practice-based publications. The author was approached by the editors to write the book.

Art and Architecture of Ireland Volume Four:Architecture: 1600-2000

Three Entries: Peacelines; Public Housing in Northern Ireland in the Twentieth Century; Interpretive Centres, NI Peacelines, NI Social Housing

Between “the Housewife” and “the Philosophy Professor”: Music, Narration and Address in Ousmane Sembene's Xala

The acclaimed Senegalese filmmaker Ousmane Sembene conceptualised himself as a modern day griot (West African oral performer), producing often didactic films that address a diverse spectatorship. Examining Xala, this paper argues that this address cannot be fully understood without attention to the film’s complex music/image relationships, which refigure classical and modernist film aesthetics to mobilise a discourse that recalls oral performance. In this way, Sembene negotiates the tensions of address generated by a spectatorship that is situated in the culturally hybrid spaces between the literate and the oral, the urban and the rural, and the global and the local.

MSGR-based Low Latency Complex Matrix Inversion Architecture

This paper presents a matrix inversion architecture based on the novel Modified Squared Givens Rotations (MSGR) algorithm, which extends the original SGR method to complex valued data, and also corrects erroneous results in the original SGR method when zeros occur on the diagonal of the matrix either initially or during processing. The MSGR algorithm also avoids complex dividers in the matrix inversion, thus minimising the complexity of potential real-time implementations. A systolic array architecture is implemented and FPGA synthesis results indicate a high-throughput low-latency complex matrix inversion solution. © 2008 IEEE.

Subpixel interpolation architecture for multistandard video motion estimation

A new reconfigurable subpixel interpolation architecture for multistandard (e.g., MPEG-2, MPEG-4, H.264, and AVS) video motion estimation (ME) is presented. This exploits the mixed use of parallel and serial-input FIR filters to achieve high throughput rate and efficient silicon utilization. Silicon design studies show that this can be implemented using 34.8 × 10 3 gates with area and performance that compares very favorably with specific fixed solutions, e.g., for the H.264 standard alone. This can support SDTV and HDTV applications when implemented in 0.18 µm CMOS technology, with further performance enhancements achievable at 0.13 µm and below. © 2009 IEEE.

Online CORDIC algorithm and VLSI architecture for implementing QR-array processors

A novel most significant digit first CORDIC architecture is presented that is suitable for the VLSI design of systolic array processor cells for performing QR decomposition. This is based on an on-line CORDIC algorithm with a constant scale factor and a latency independent of the wordlength. This has been derived through the extension of previously published CORDIC algorithms. It is shown that simplifying the calculation of convergence bounds also greatly simplifies the derivation of suitable VLSI architectures. Design studies, based on a 0.35-µ CMOS standard cell process, indicate that 20 such QR processor cells operating at rates suitable for radar beamfoming can be readily accommodated on a single chip.