Decoupled-DFIG fault ride-through strategy for enhanced stability performance during grid faults

This paper proposes a decoupled fault ride-through strategy for a doubly fed induction generator (DFIG) to enhance network stability during grid disturbances. The decoupled operation proposes that a DFIG operates as an induction generator (IG) with the converter unit acting as a reactive power source during a fault condition. The transition power characteristics of the DFIG have been analyzed to derive the capability of the proposed strategy under various system conditions. The optimal crowbar resistance is obtained to exploit the maximum power capability from the DFIG during decoupled operation. The methods have been established to ensure proper coordination between the IG mode and reactive power compensation from the grid-side converter during decoupled operation. The viability and benefits of the proposed strategy are demonstrated using different test network structures and different wind penetration levels. Control performance has been benchmarked against existing grid code standards and commercial wind generator systems, based on the optimal network support required (i.e., voltage or frequency) by the system operator from a wind farm installed at a particular location.

Application of Nonlinear PCA for Fault Detection in Polymer Extrusion Processes

This paper describes the application of an improved nonlinear principal component analysis (PCA) to the detection of faults in polymer extrusion processes. Since the processes are complex in nature and nonlinear relationships exist between the recorded variables, an improved nonlinear PCA, which incorporates the radial basis function (RBF) networks and principal curves, is proposed. This algorithm comprises two stages. The first stage involves the use of the serial principal curve to obtain the nonlinear scores and approximated data. The second stage is to construct two RBF networks using a fast recursive algorithm to solve the topology problem in traditional nonlinear PCA. The benefits of this improvement are demonstrated in the practical application to a polymer extrusion process.

Protection Assessment using Reduced Power System Fault Data

Wavelet transforms provide basis functions for time-frequency analysis and have properties that are particularly useful for the compression of analogue point on wave transient and disturbance power system signals. This paper evaluates the compression properties of the discrete wavelet transform using actual power system data. The results presented in the paper indicate that reduction ratios up to 10:1 with acceptable distortion are achievable. The paper discusses the application of the reduction method for expedient fault analysis and protection assessment.

FAULT-TOLERANT ALGORITHM FOR HIGH-AVAILABILITY AND WAFER SCALE SYSTEMS.

In this paper, the authors have presented one approach to configuring a Wafer-Scale Integration Chip. The approach described is called the 'WINNER', in which bus channels and an external controller for configuring the working processors are not required. In addition, the technique is applicable to high availability systems constructed using conventional methods. The technique can also be extended to arrays of arbitrary size and with any degree of fault tolerance simply by using an appropriate number of cells.

YIELD ENHANCEMENT OF BIT LEVEL SYSTOLIC ARRAY CHIPS USING FAULT TOLERANT TECHNIQUES.

Methods by which bit level systolic array chips can be made fault tolerant are discussed briefly. Using a simple analysis based on both Poisson and Bose-Einstein statistics authors demonstrate that such techniques can be used to obtain significant yield enhancement. Alternatively, the dimensions of an array can be increased considerably for the same initial (nonfault tolerant) chip yield.