Hydrogen-permeation characteristics of a SrCeO3-based ceramic separation membrane:Thermal, ageing and surface-modification effects

Dense ceramics with mixed protonic-electronic conductivity are of considerable interest for the separation and purification of hydrogen and as electrochemical reactors. In this work, the hydrogen permeability of a Sr_0.97Ce_0.9Yb_0.1O_{3 - δ} (SCYb) membrane with a porous Pt catalytic layer on the hydrogen feed-exposed side has been studied over the temperature range 500-804 °C employing Ar as the permeate sweep gas. A SiO₂-B₂O₃-BaO-MgO-ZnO-based glass-ceramic sealant was successfully employed to seal the membrane to the dual-chamber reactor. After 14 h of exposure to 10% H₂:90% N₂ at 804 °C, the H₂ flux reached a maximum of 33 nmol cm^{- 2} s^{- 1}, over an order of magnitude higher than that obtained on membranes of similar thickness without surface modification. The permeation rate then decreased slowly and moderately on annealing at 804 °C over a further 130 h. Thereafter, the flux was both reproducible and stable on thermal cycling in the range 600-804 °C. The results indicate an important role of superficial activation processes in the flux rate and suggest that hydrogen fluxes can be further optimised in cerate-based perovskites. © 2009 Elsevier B.V. All rights reserved.

Refresh-free dynamic standard-cell based memories: Application to a QC-LDPC decoder

The area and power consumption of low-density parity check (LDPC) decoders are typically dominated by embedded memories. To alleviate such high memory costs, this paper exploits the fact that all internal memories of a LDPC decoder are frequently updated with new data. These unique memory access statistics are taken advantage of by replacing all static standard-cell based memories (SCMs) of a prior-art LDPC decoder implementation by dynamic SCMs (D-SCMs), which are designed to retain data just long enough to guarantee reliable operation. The use of D-SCMs leads to a 44% reduction in silicon area of the LDPC decoder compared to the use of static SCMs. The low-power LDPC decoder architecture with refresh-free D-SCMs was implemented in a 90nm CMOS process, and silicon measurements show full functionality and an information bit throughput of up to 600 Mbps (as required by the IEEE 802.11n standard).

Multiple source quantum well model of porous silicon light emission

Based on photoluminescence, Fourier transform infrared spectroscopy, and atomic force microscopy results, a new light emitting model for porous silicon (multiple source quantum well model) is proposed.

A low overhead error confinement method based on application statistical characteristics

Reliability has emerged as a critical design constraint especially in memories. Designers are going to great lengths to guarantee fault free operation of the underlying silicon by adopting redundancy-based techniques, which essentially try to detect and correct every single error. However, such techniques come at a cost of large area, power and performance overheads which making many researchers to doubt their efficiency especially for error resilient systems where 100% accuracy is not always required. In this paper, we present an alternative method focusing on the confinement of the resulting output error induced by any reliability issues. By focusing on memory faults, rather than correcting every single error the proposed method exploits the statistical characteristics of any target application and replaces any erroneous data with the best available estimate of that data. To realize the proposed method a RISC processor is augmented with custom instructions and special-purpose functional units. We apply the method on the proposed enhanced processor by studying the statistical characteristics of the various algorithms involved in a popular multimedia application. Our experimental results show that in contrast to state-of-the-art fault tolerance approaches, we are able to reduce runtime and area overhead by 71.3% and 83.3% respectively.

Dielectric screening in atomically thin boron nitride nanosheets

Two-dimensional (2D) hexagonal boron nitride (BN) nanosheets are excellent dielectric substrate for graphene, molybdenum disulfide, and many other 2D nanomaterial-based electronic and photonic devices. To optimize the performance of these 2D devices, it is essential to understand the dielectric screening properties of BN nanosheets as a function of the thickness. Here, electric force microscopy along with theoretical calculations based on both state-of-the-art first-principles calculations with van der Waals interactions under consideration, and nonlinear Thomas-Fermi theory models are used to investigate the dielectric screening in high-quality BN nanosheets of different thicknesses. It is found that atomically thin BN nanosheets are less effective in electric field screening, but the screening capability of BN shows a relatively weak dependence on the layer thickness.