A 60 GHz wide tuning range SiGe bipolar VCO for HDMI and wireless docking applications

A wide tuning range voltage controlled oscillator (VCO) with novel architecture is proposed in this work. The entire circuit consists of a VCO core, a summing circuit, a single-ended to differential (STD) converter and a buffer amplifier. The VCO core oscillates at half the desired frequency and the second harmonic of the VCO core is extracted by the summing circuit, which is then converted to a differential pair by the STD. The entire VCO circuit operates from 58.85 to 70.85 GHz with 20% frequency tuning range. The measured VCO gain is less than 1.6 GHz/V. The measured phase noise at 3 MHz offset is less than -78 dBc/Hz across the entire tuning range. The differential phase error of the output signals is measured by down converting the VCO output signals to low gigahertz frequency using an on-chip mixer. The measured differential phase error is less than 8°. The VCO circuit, which is constructed using 0.35 µm SiGe technology, occupies 770 × 550 µm2 die area and consumes 62 mA under 3.5 V supply.

Low Insertion Loss Substrate Integrated Waveguide Quasi–Elliptic Filters for V- Band Wireless Personal Area Network Applications

Novel V-band substrate integrated waveguide (SIW) filters have been presented. Design procedures for the filters synthesis and mechanisms providing quasi-elliptic response have been explained. The insertion loss of the filters has been measured below 2 dB with microstrip-to-SIW transitions being included.

Surface Modification of Photoresist SU-8 for Low Autofluorescence and Bioanalytical Applications

This paper reports a surface modification of epoxy-based negative photoresist SU-8 for reducing its autofluorescence while enhancing its biofunctionality. By covalently depositing a thin layer of 20 nm Au nanoparticles (AuNPs) onto the SU-8 surface, we found that the AuNPs-coated SU-8 surface is much less fluorescent than the untreated SU-8. Moreover, DNA probes can easily be immobilized on the Au surface and are thermally stable over a wide range of temperature. These improvements will benefit bioanalytical applications such as DNA hybridization and solid-phase PCR (SP-PCR).

Process-variation resilient and voltage-scalable dct architecture for robust low-power computing

In this paper, we present a novel discrete cosine transform (DCT) architecture that allows aggressive voltage scaling for low-power dissipation, even under process parameter variations with minimal overhead as opposed to existing techniques. Under a scaled supply voltage and/or variations in process parameters, any possible delay errors appear only from the long paths that are designed to be less contributive to output quality. The proposed architecture allows a graceful degradation in the peak SNR (PSNR) under aggressive voltage scaling as well as extreme process variations. Results show that even under large process variations (±3σ around mean threshold voltage) and aggressive supply voltage scaling (at 0.88 V, while the nominal voltage is 1.2 V for a 90-nm technology), there is a gradual degradation of image quality with considerable power savings (71% at PSNR of 23.4 dB) for the proposed architecture, when compared to existing implementations in a 90-nm process technology. © 2006 IEEE.