67 resultados para current-mode design
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Purpose. The purpose of this study is to demonstrate the rational design and behaviour of the first dual mode optical and chemical prodrug, exemplified by an acetyl salicylic acid-based system. Methods. A cyclic 1,4-benzodioxinone prodrug was synthesised by reaction of 3,5-dimethoxybenzoin and acetyl salicoyl chloride with pyridine. After purification by column chromatography and recrystallization, characterization was achieved using infrared and NMR spectroscopies, mass spectrometry, elemental analysis and single crystal X-ray diffraction. Light-triggered drug liberation was characterised via UV-visible spectroscopy following low-power 365 nm irradiation for controlled times. Chemical drug liberation was characterised via UV-visible spectroscopy in pH 5.5 solution. Results. The synthetic method yielded pure prodrug, with full supporting characterisation. Light-triggered drug liberation proceeded at a rate of 8.30 10j2 sj1, while chemical, hydrolytic liberation proceeded independently at 1.89 10j3 sj1. The photochemical and hydrolytic reactions were both quantitative. Conclusions. This study demonstrates the first rational dual-mode optical and chemical prodrug, using acetyl salicylic acid as a model, acting as a paradigm for future dual-mode systems. Photochemical drug liberation proceeds 44 times faster than chemical liberation, suggesting potential use in drug-eluting medical devices where an additional burst of drug is required at the onset of infection.
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Mixed-mode simulation, where device simulation is embedded directly within a circuit simulator, is used for the first time to provide scaling guidelines to achieve optimal digital circuit performance for double gate SOI MOSFETs. This significant advance overcomes the lack of availability of SPICE model parameters. The sensitivity of the gate delay and on-off current ratio to each of the key geometric and technological parameters of the transistor is quantified. The impact of the source-drain doping profile on circuit performance is comprehensively investigated.
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This paper describes an early career researcher's expereince of using randomised controlled trial methodology to investigarte the effectiveness of psychotherapeutic interventions for traumatised families in a 'real world' setting.
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Numerous studies have shown that postbuckling stiffened panels may undergo abrupt changes in buckled mode
shape when loaded in uniaxial compression. This phenomenon is often referred to as a mode jump or secondary
instability. The resulting sudden release of stored energy may initiate damage in vulnerable regions within a
structure, for example, at the skin-stiffener interface of a stiffened composite panel. Current design practice is to
remove a mode jump by increasing the skin thickness of the postbuckling region. A layup optimization methodology,
based on a genetic algorithm, is presented, which delays the onset of secondary instabilities in a composite structure
while maintaining a constant weight and subject to a number of design constraints. A finite element model was
developed of a stiffened panel’s skin bay, which exhibited secondary instabilities. An automated numerical routine
extracted information directly from the finite element displacement results to detect the onset of initial buckling and
secondary instabilities. This routine was linked to the genetic algorithm to find a revised layup for the skin bay, within
appropriate design constraints, to delay the onset of secondary instabilities. The layup optimization methodology,
resulted in a panel that had a higher buckling load, prebuckling stiffness, and secondary instability load than the
baseline design.
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Analysis and synthesis of the new Class-EF power amplifier (PA) are presented in this paper. The proposed circuit offers means to alleviate some of the major issues faced by existing Class-EF and Class-EF PAs, such as (1) substantial power losses due to parasitic resistance of the large inductor in the Class-EF load network, (2) unpredictable behaviour of practical lumped inductors and capacitors at harmonic frequencies, and (3) deviation from ideal Class-EF operation mode due to detrimental effects of device output inductance at high frequencies. The transmission-line load network of the Class-EF PA topology elaborated in this paper simultaneously satisfies the Class-EF optimum impedance requirements at fundamental frequency, second, and third harmonics as well as simultaneously providing matching to the circuit optimum load resistance for any prescribed system load resistance. Furthermore, an elegant solution using an open and short-circuit stub arrangement is suggested to overcome the problem encountered in the mm-wave IC realizations of the Class-EF PA load network due to lossy quarter-wave line. © 2010 IEICE Institute of Electronics Informati.
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In this paper, a multi-level wordline driver scheme is presented to improve 6T-SRAM read and write stability. The proposed wordline driver generates a shaped pulse during the read mode and a boosted wordline during the write mode. During read, the shaped pulse is tuned at nominal voltage for a short period of time, whereas for the remaining access time, the wordline voltage is reduced to save the power consumption of the cell. This shaped wordline pulse results in improved read noise margin without any degradation in access time for small wordline load. The improvement is explained by examining the dynamic and nonlinear behavior of the SRAM cell. Furthermore, during the hold mode, for a short time (depending on the size of boosting capacitance), wordline voltage becomes negative and charges up to zero after a specific time that results in a lower leakage current compared to conventional SRAM. The proposed technique results in at least 2× improvement in read noise margin while it improves write margin by 3× for lower supply voltages than 0.7 V. The leakage power for the proposed SRAM is reduced by 2% while the total power is improved by 3% in the worst case scenario for an SRAM array. The main advantage of the proposed wordline driver is the improvement of dynamic noise margin with less than 2.5% penalty in area. TSMC 65 nm technology models are used for simulations.
Adaptive backstepping droop controller design for multi-terminal high-voltage direct current systems
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Wind power is one of the most developed renewable energy resources worldwide. To integrate offshore wind farms to onshore grids, the high-voltage direct current (HVDC) transmission cables interfaced with voltage source converters (VSCs) are considered to be a better solution than conventional approaches. Proper DC voltage indicates successive power transfer. To connect more than one onshore grid, the DC voltage droop control is one of the most popular methods to share the control burden between different terminals. However, the challenges are that small droop gains will cause voltage deviations, while higher droop gain settings will cause large oscillations. This study aims to enhance the performance of the traditional droop controller by considering the DC cable dynamics. Based on the backstepping control concept, DC cables are modelled with a series of capacitors and inductors. The final droop control law is deduced step-by-step from the original remote side. At each step the control error from the previous step is considered. Simulation results show that both the voltage deviations and oscillations can be effectively reduced using the proposed method. Further, power sharing between different terminals can be effectively simplified such that it correlates linearly with the droop gains, thus enabling simple yet accurate system operation and control.
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The use of high-quality quarried crushed rock aggregates is generally required to comply with current specifications for unbound granular materials (UGMs) in pavements. The source of these high-quality materials can be a long distance from the site, resulting in high transportation costs. The use of more local sources of marginal materials or the use of secondary aggregates is not allowed if they do not fully comply with existing specifications. These materials can, however, be assessed for their suitability for use in a pavement by considering performance criteria such as resistance to permanent deformation and degradation instead of relying on compliance with inflexible specifications. The final thickness of the asphalt cover and the pavement depth are governed by conventional pavement design methods, which consider the number of vehicle passes, subgrade strength, and some material property, commonly the California bearing ratio or resilient modulus. A pavement design method that includes as a design criterion an assessment of the resistance to deformation of a UGM in a pavement structure at a particular stress state is proposed. The particular stress state at which the aggregate is to perform in an acceptable way is related to the in situ stress, that is, the stress that the aggregate is anticipated to experience at a particular depth in the pavement. Because the stresses are more severe closer to the pavement surface, the aggregates should be better able to resist these stresses the closer they are laid to the surface in the pavement. This method was applied to two Northern Ireland aggregates of different quality (NI Good and NI Poor). The results showed that the NI Poor aggregate performed at an acceptable level with respect to permanent deformation, provided that a minimum of 70 mm of asphalt cover was provided. It was predicted that the NI Good material would require 60 mm of asphalt cover.
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1. Isolated sheep urethral cells were studied using the perforated patch clamp technique (T = 37 degrees C). Depolarizing steps ranging from -40 to -10 mV evoked an inward current that peaked within 10 ms and a slower inward current. Stepping back to the holding potential of -80 mV evoked large inward tail currents. All three currents were abolished by nifedipine (1 microM). Substitution of external Ca2+ with Ba2+ resulted in potentiation of the fast inward current and blockade of the slow current and tails. 2. Changing the chloride equilibrium potential (ECl) from 0 to +27 mV shifted the reversal potential of the tail currents from 1 +/- 1 to 27 +/- 1 mV (number of cells, n = 5). Chloride channel blockers, niflumic acid (10 microM) and anthracene-9-carboxylic acid (9AC, 1 mM), reduced the slow current and tails suggesting that these were Ca(2+)-activated Cl- currents, ICl(Ca). 4. Caffeine (10 mM) induced currents that reversed at ECl and were blocked by niflumic acid (10 microM). 5. In current clamp mode, some cells developed spontaneous transient depolarizations (STDs) and action potentials. Short exposure to nifedipine blocked the action potentials and unmasked STDs. In contrast, 9AC and niflumic acid reduced the amplitude of the STDs and blocked the action potentials. 6. In conclusion, these cells have both L-type ICa and ICl(Ca). The former appears to be responsible for the upstroke of the action potential, while the latter may act as a pacemaker current.
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This study describes the formulation, characterisation and preliminary clinical evaluation of mucoadhesive, semi-solid formulations containing hydroxyethylcellulose (HEC, 1-5%, w/w), polyvinylpyrrolidine (PVP, 2 or 3%, w/w), poly carbophil (PC, 1 or 3%, w/w) and tetracycline (5%, w/w, as the hydrochloride). Each formulation was characterised in terms of drug release, hardness, compressibility, adhesiveness (using a texture analyser in texture profile analysis mode), syringeability (using a texture analyser in compression mode) and adhesion to a mucin disc (measured as a detachment force using the texture analyser in tensile mode). The release exponent for the formulations ranged from 0.78+/-0.02 to 1.27+/-0.07, indicating that drug release was non-diffusion controlled. Increasing the concentrations of each polymeric component significantly increased the time required for 10 and 30% release of the original mass of tetracycline, due to both increased viscosity and, additionally, the unique swelling properties of the formulations. Increasing concentrations of each polymeric component also increased the hardness, compressibility, adhesiveness, syringeability and mucoadhesion of the formulations. The effects on product hardness, compressibility and syringeability may be due to increased product viscosity and, hence, increased resistance to compression. Similarly, the effects of these polymers on adhesiveness/mucoadhesion highlight their mucoadhesive nature and, importantly, the effects of polymer state (particularly PC) on these properties. Thus, in formulations where the neutralisation of PC was maximally suppressed, adhesiveness and mucoadhesion were also maximal. Interestingly, statistical interactions were primarily observed between the effects of HEC and PC on drug release, mechanical and mucoadhesive properties. These were explained by the effects of HEC on the physical state of PC, namely swollen or unswollen. In the preliminary clinical evaluation, a formulation was selected that offered an appropriate balance of the above physical properties and contained 3% HEC, 3% PVP and 1% PC, in addition to tetracycline 5% (as the hydrochloride). The clinical efficacy of this (test) formulation was compared to an identical tetracycline-devoid (control) formulation in nine periodontal pockets (greater than or equal to 5 mm depth). One week following administration of the test formulation, there was a significant improvement in periodontal health as identified by reduced numbers of sub-gingival microbial pathogens. Therefore, it can be concluded that, when used in combination with mechanical plaque removal, the tetracycline-containing semi-solid systems described in this study would augment such therapy by enhancing the removal of pathogens, thus improving periodontal health. (C) 2000 Elsevier Science B.V. All rights reserved.
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We show that by introducing a gap at the center of the helical sections (where the current is minimum) of a lambda/2 quadrifilar helix antenna (QHA) and varying the axial length and radial gap between the overlapping volutes, the antenna gives a 28% impedance bandwidth which is nine times the bandwidth of a conventional QHA. A 16% bandwidth with a front to back ratio of >= 14 dB is achievable with 5-14% reduction in the size of the QHA. The structure can yield a monopole radiation pattern suitable for terrestrial applications or a hemispherical pattern suitable for satellite use. The simulation results are validated by measurements at L-band.
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In this paper, by investigating the influence of source/drain extension region engineering (also known as gate-source/drain underlap) in nanoscale planar double gate (DG) SOI MOSFETs, we offer new insights into the design of future nanoscale gate-underlap DG devices to achieve ITRS projections for high performance (HP), low standby power (LSTP) and low operating power (LOP) logic technologies. The impact of high-kappa gate dielectric, silicon film thickness, together with parameters associated with the lateral source/drain doping profile, is investigated in detail. The results show that spacer width along with lateral straggle can not only effectively control short-channel effects, thus presenting low off-current in a gate underlap device, but can also be optimized to achieve lower intrinsic delay and higher on-off current ratio (I-on/I-off). Based on the investigation of on-current (I-on), off-current (I-off), I-on/I-off, intrinsic delay (tau), energy delay product and static power dissipation, we present design guidelines to select key device parameters to achieve ITRS projections. Using nominal gate lengths for different technologies, as recommended from ITRS specification, optimally designed gate-underlap DG MOSFETs with a spacer-to-straggle (s/sigma) ratio of 2.3 for HP/LOP and 3.2 for LSTP logic technologies will meet ITRS projection. However, a relatively narrow range of lateral straggle lying between 7 to 8 nm is recommended. A sensitivity analysis of intrinsic delay, on-current and off-current to important parameters allows a comparative analysis of the various design options and shows that gate workfunction appears to be the most crucial parameter in the design of DG devices for all three technologies. The impact of back gate misalignment on I-on, I-off and tau is also investigated for optimized underlap devices.
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The present paper proposes for the first time, a novel design methodology based on the optimization of source/drain extension (SDE) regions to significantly improve the trade-off between intrinsic voltage gain (A(vo)) and cut-off frequency (f(T)) in nanoscale double gate (DG) devices. Our results show that an optimally designed 25 nm gate length SDE region engineered DG MOSFET operating at drain current of 10 mu A/mu m, exhibits up to 65% improvement in intrinsic voltage gain and 85% in cut-off frequency over devices designed with abrupt SIDE regions. The influence of spacer width, lateral source/drain doping gradient and symmetric as well as asymmetrically designed SDE regions on key analog figures of merit (FOM) such as transconductance (g(m)), transconductance-to-current ratio (g(m)/I-ds), Early voltage (V-EA), output conductance (g(ds)) and gate capacitances are examined in detail. The present work provides new opportunities for realizing future low-voltage/low-power analog circuits with nanoscale SDE engineered DG MOSFETs. (C) 2007 Elsevier B.V. All rights reserved.
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In this paper, we analyze the enormous potential of engineering source/drain extension (SDE) regions in FinFETs for ultra-low-voltage (ULV) analog applications. SDE region design can simultaneously improve two key analog figures of merit (FOM)-intrinsic de gain (A(vo)) and cutoff frequency (f(T)) for 60 and 30 nm FinFETs operated at low drive current (J(ds) = 5 mu A/mu m). The improved Avo and fT are nearly twice compared to those of devices with abrupt SDE regions. The influence of the SDE region profile and its impact on analog FOM is extensively analyzed. Results show that SDE region optimization provides an additional degree of freedom apart from device parameters (fin width and aspect ratio) to design future nanoscale analog devices. The results are analyzed in terms of spacer-to-straggle ratio a new design parameter for SDE engineered devices. This paper provides new opportunities for realizing future ULV/low-power analog design with FinFETs.