Targeting heterogeneous architectures via macro data flow

We propose a data flow based run time system as an efficient tool for supporting execution of parallel code on heterogeneous architectures hosting both multicore CPUs and GPUs. We discuss how the proposed run time system may be the target of both structured parallel applications developed using algorithmic skeletons/parallel design patterns and also more "domain specific" programming models. Experimental results demonstrating the feasibility of the approach are presented. © 2012 World Scientific Publishing Company.

USE OF UNIDIRECTIONAL DATA FLOW IN BIT-LEVEL SYSTOLIC ARRAY CHIPS.

We show how the architecture of two recently reported bit-level systolic array circuits - a single-bit coefficient correlator and a multibit convolver - may be modified to incorporate unidirectional data flow. This feature has advantages in terms of chip cascadability, fault tolerance and possible wafer-scale integration.

A bit-level systolic architecture for implementing a VQ tree search

A bit-level systolic array system for performing a binary tree Vector Quantization codebook search is described. This consists of a linear chain of regular VLSI building blocks and exhibits data rates suitable for a wide range of real-time applications. A technique is described which reduces the computation required at each node in the binary tree to that of a single inner product operation. This method applies to all the common distortion measures (including the Euclidean distance, the Weighted Euclidean distance and the Itakura-Saito distortion measure) and significantly reduces the hardware required to implement the tree search system. © 1990 Kluwer Academic Publishers.

A Data Model for Content Modelling of Temporal Media

This paper describes a data model for content representation of temporal media in an IP based sensor network. The model is formed by introducing the idea of semantic-role from linguistics into the underlying concepts of formal event representation with the aim of developing a common event model. The architecture of a prototype system for a multi camera surveillance system, based on the proposed model is described. The important aspects of the proposed model are its expressiveness, its ability to model content of temporal media, and its suitability for use with a natural language interface. It also provides a platform for temporal information fusion, as well as organizing sensor annotations by help of ontologies.

Critical Dialogue in Architecture Studio: Peer Interaction and Feedback

Most tutors in architecture education regard studio-based learning to be rich in feedback due to is dialogic nature. Yet, student perceptions communicated via audits such as the UK National Student Survey appear to contradict this assumption and challenge the efficacy of design studio as a truly discursive learning setting. This paper presents findings from a collaborative study that was undertaken by the Robert Gordon University, Aberdeen, and Queen’s University Belfast that develop a deeper understanding of the role that peer interaction and dialogue plays within feedback processes, and the value that students attribute to these within the overall learning experience.

The paper adopts a broad definition of feedback, with emphasis on formative processes, and including the various kinds of dialogue that typify studio-based learning, and which constitute forms of guidance, direction, and reflection. The study adopted an ethnographic approach, gathering data on student and staff perceptions over the course of an academic year, and utilising methods embracing both quantitative and qualitative data.

The study found that the informal, socially-based peer interaction that characterises the studio is complementary to, and quite distinct from, the learning derived through tutor interaction. The findings also articulate the respective properties of informal and formally derived feedback and the contribution each makes to the quality of studio-based learning. It also identifies limitations in the use or value of peer learning, understanding of which is valuable to enhancing studio learning in architecture.

Shifting Ground:Beyond National Architecture

The Irish Pavilion at the Venice Architecture Biennale 2012 charts a position for Irish architecture in a global culture where the modes of production of architecture are radically altered. Ireland is one of the most globalised countries in the world, yet it has developed a national culture of architecture derived from local place as a material construct. We now have to evolve our understanding in the light of the globalised nature of economic processes and architectural production which is largely dependent on internationally networked flows of products, data, and knowledge. We have just begun to represent this situation to ourselves and others. How should a global architecture be grounded culturally and philosophically? How does it position itself outside of shared national reference points?
heneghan peng architects were selected as participants because they are working across three continents on a range of competition-winning projects. Several of these are in sensitive and/or symbolic sites that include three UNESCO World Heritage sites, including the Grand Egyptian Museum in Cairo, the Giants Causeway Visitor Centre in Northern Ireland, and the new Rhine Bridge near Lorelei.
Our dialogue led us to discussing the universal languages of projective geometry and number are been shared by architects and related professionals. In the work of heneghan peng, the specific embodiment of these geometries is carefully calibrated by the choice of materials and the detailed design of their physical performance on site. The stone facade of the Giant’s Causeway Visitor Centre takes precise measure of the properties of the volcanic basalt seams from which it is hewn. The extraction of the stone is the subject of the pavilion wall drawings which record the cutting of stones to create the façade of the causeway centre.
We also identified water as an element which is shared across the different sites. Venice is a perfect place to take measure of this element which suggests links to another site – the Nile Valley which was enriched by the annual flooding of the River Nile. An ancient Egyptian rod for measuring the water level of the Nile inspired the design of the Nilometre - a responsive oscillating bench that invites visitors to balance their respective weights. This action embodies the ways of thinking that are evolving to operate in the globalised world, where the autonomous architectural object is dissolving into an expanded field of conceptual rules and systems. The bench constitutes a shifting ground located in the unstable field of Venice. It is about measurement and calibration of the weight of the body in relation to other bodies; in relation to the site of the installation; and in relation to water. The exhibit is located in the Artiglierie section of the Arsenale. Its level is calibrated against the mark of the acqua alta in the adjacent brickwork of the building which embodies a liminal moment in the fluctuating level of the lagoon.
The weights of bodies, the level of water, changes over time, are constant aspects of design across cultures and collectively they constitute a common ground for architecture - a ground shared with other design professionals. The movement of the bench required complex engineering design and active collaboration between the architects, engineers and fabricators. It is a kind of prototype – a physical object produced from digital data that explores the mathematics at play – the see-saw motion invites the observer to become a participant, to give it a test drive. It shows how a simple principle can generate complex effects that are difficult to predict and invites visitors to experiment and play with them.

The Forgiving Graph: a distributed data structure for low stretch under adversarial attack

We consider the problem of self-healing in peer-to-peer networks that are under repeated attack by an omniscient adversary. We assume that, over a sequence of rounds, an adversary either inserts a node with arbitrary connections or deletes an arbitrary node from the network. The network responds to each such change by quick “repairs,” which consist of adding or deleting a small number of edges. These repairs essentially preserve closeness of nodes after adversarial deletions, without increasing node degrees by too much, in the following sense. At any point in the algorithm, nodes v and w whose distance would have been l in the graph formed by considering only the adversarial insertions (not the adversarial deletions), will be at distance at most l log n in the actual graph, where n is the total number of vertices seen so far. Similarly, at any point, a node v whose degree would have been d in the graph with adversarial insertions only, will have degree at most 3d in the actual graph. Our distributed data structure, which we call the Forgiving Graph, has low latency and bandwidth requirements. The Forgiving Graph improves on the Forgiving Tree distributed data structure from Hayes et al. (2008) in the following ways: 1) it ensures low stretch over all pairs of nodes, while the Forgiving Tree only ensures low diameter increase; 2) it handles both node insertions and deletions, while the Forgiving Tree only handles deletions; 3) it requires only a very simple and minimal initialization phase, while the Forgiving Tree initially requires construction of a spanning tree of the network.

Multi-standard sub-pixel interpolation architecture for video motion estimation

A new domain-specific reconfigurable sub-pixel interpolation architecture for multi-standard video Motion Estimation (ME) is presented. The mixed use of parallel and serial-input FIR filters achieves high throughput rate and efficient silicon utilisation. Flexibility has been achieved by using a multiplexed reconfigurable data-path controlled by a selection signal. Silicon design studies show that this can be implemented using 34.8K gates with area and performance that compares very favourably with existing fixed solutions based solely on the H.264 standard. ©2008 IEEE.

Low-power DWT-based quasi-averaging algorithm and architecture for epileptic seizure detection

In this paper, we have developed a low-complexity algorithm for epileptic seizure detection with a high degree of accuracy. The algorithm has been designed to be feasibly implementable as battery-powered low-power implantable epileptic seizure detection system or epilepsy prosthesis. This is achieved by utilizing design optimization techniques at different levels of abstraction. Particularly, user-specific critical parameters are identified at the algorithmic level and are explicitly used along with multiplier-less implementations at the architecture level. The system has been tested on neural data obtained from in-vivo animal recordings and has been implemented in 90nm bulk-Si technology. The results show up to 90 % savings in power as compared to prevalent wavelet based seizure detection technique while achieving 97% average detection rate. Copyright 2010 ACM.

Autonomic scheduling of tasks from data parallel patterns to CPU/GPU core mixes

We propose a methodology for optimizing the execution of data parallel (sub-)tasks on CPU and GPU cores of the same heterogeneous architecture. The methodology is based on two main components: i) an analytical performance model for scheduling tasks among CPU and GPU cores, such that the global execution time of the overall data parallel pattern is optimized; and ii) an autonomic module which uses the analytical performance model to implement the data parallel computations in a completely autonomic way, requiring no programmer intervention to optimize the computation across CPU and GPU cores. The analytical performance model uses a small set of simple parameters to devise a partitioning-between CPU and GPU cores-of the tasks derived from structured data parallel patterns/algorithmic skeletons. The model takes into account both hardware related and application dependent parameters. It computes the percentage of tasks to be executed on CPU and GPU cores such that both kinds of cores are exploited and performance figures are optimized. The autonomic module, implemented in FastFlow, executes a generic map (reduce) data parallel pattern scheduling part of the tasks to the GPU and part to CPU cores so as to achieve optimal execution time. Experimental results on state-of-the-art CPU/GPU architectures are shown that assess both performance model properties and autonomic module effectiveness. © 2013 IEEE.

Defining the role of common variation in the genomic and biological architecture of adult human height

Using genome-wide data from 253,288 individuals, we identified 697 variants at genome-wide significance that together explained one-fifth of the heritability for adult height. By testing different numbers of variants in independent studies, we show that the most strongly associated 1/42,000, 1/43,700 and 1/49,500 SNPs explained 1/421%, 1/424% and 1/429% of phenotypic variance. Furthermore, all common variants together captured 60% of heritability. The 697 variants clustered in 423 loci were enriched for genes, pathways and tissue types known to be involved in growth and together implicated genes and pathways not highlighted in earlier efforts, such as signaling by fibroblast growth factors, WNT/I 2-catenin and chondroitin sulfate-related genes. We identified several genes and pathways not previously connected with human skeletal growth, including mTOR, osteoglycin and binding of hyaluronic acid. Our results indicate a genetic architecture for human height that is characterized by a very large but finite number (thousands) of causal variants.

Incorporating PGMs into a BDI Architecture

In this paper, we present a hybrid BDI-PGM framework, in which PGMs (Probabilistic Graphical Models) are incorporated into a BDI (belief-desire-intention) architecture. This work is motivated by the need to address the scalability and noisy sensing issues in SCADA (Supervisory Control And Data Acquisition) systems. Our approach uses the incorporated PGMs to model the uncertainty reasoning and decision making processes of agents situated in a stochastic environment. In particular, we use Bayesian networks to reason about an agent’s beliefs about the environment based on its sensory observations, and select optimal plans according to the utilities of actions defined in influence diagrams. This approach takes the advantage of the scalability of the BDI architecture and the uncertainty reasoning capability of PGMs. We present a prototype of the proposed approach using a transit scenario to validate its effectiveness.