Implementation of a novel credit based SCFQ scheduler for Broadband Wireless Access

A novel tag computation circuit for a credit based Self-Clocked Fair Queuing (SCFQ) Scheduler is presented. The scheduler combines Weighted Fair Queuing (WFQ) with a credit based bandwidth reallocation scheme. The proposed architecture is able to reallocate bandwidth on the fly if particular links suffer from channel quality degradation .The hardware architecture is parallel and pipelined enabling an aggregated throughput rate of 180 million tag computations per second. The throughput performance is ideal for Broadband Wireless Access applications, allowing room for relatively complex computations in QoS aware adaptive scheduling. The high-level system break-down is described and synthesis results for Altera Stratix II FPGA technology are presented.

Probing quantum communication rules by addition and subtraction of single photons to/from a light field

The possibility of arbitrarily "adding" and "subtracting" single photons to and from a light field may give access to a complete engineering of quantum states and to fundamental quantum phenomena. We experimentally implemented simple alternated sequences of photon creation and annihilation on a thermal field and used quantum tomography to verify the peculiar character of the resulting light states. In particular, as the final states depend on the order in which the two actions are performed, we directly observed the noncommutativity of the creation and annihilation operators, one of the cardinal concepts of quantum mechanics, at the basis of the quantum behavior of light. These results represent a step toward the full quantum control of a field and may provide new resources for quantum information protocols

Increasing Staff and Student Capacity to Use the Communication Facility in Queen's Online in Order to Support Learning and Teaching on a BSW Programme

In this article the authors explore and evaluate developments in the use of information and communications technologies (ICT) within social work education at Queen's University Belfast since the inception of the new degree in social work. They look at the staff development strategy utilised to increase teacher confidence and competence in use of the Queen's Online virtual learning environment tools as well as the student experience of participation in modules involving online discussions. The authors conclude that the project provided further opportunity to reflect on how ICT can be used as a platform to support a whole course in a systematic and coordinated way and to ensure all staff remained abreast of ongoing developments in the use of ICT to support learning which is a normative expectation of students entering universities. A very satisfying outcome for the leaders is our observation of the emergence of other 'experts' in different aspects of use of ICT amongst the staff team. This project also shows that taking a team as opposed to an individual approach can be particularly beneficial

Special issue on design and programming of signal processors for multimedia communication:Special issue on design and programming of signal processors for multimedia communication

The technical challenges in the design and programming of signal processors for multimedia communication are discussed. The development of terminal equipment to meet such demand presents a significant technical challenge, considering that it is highly desirable that the equipment be cost effective, power efficient, versatile, and extensible for future upgrades. The main challenges in the design and programming of signal processors for multimedia communication are, general-purpose signal processor design, application-specific signal processor design, operating systems and programming support and application programming. The size of FFT is programmable so that it can be used for various OFDM-based communication systems, such as digital audio broadcasting (DAB), digital video broadcasting-terrestrial (DVB-T) and digital video broadcasting-handheld (DVB-H). The clustered architecture design and distributed ping-pong register files in the PAC DSP raise new challenges of code generation.