18 resultados para ZNO NANOWIRES

em CORA - Cork Open Research Archive - University College Cork - Ireland


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Thin layers of indium tin oxide are widely used as transparent coatings and electrodes in solar energy cells, flat-panel displays, antireflection coatings, radiation protection and lithium-ion battery materials, because they have the characteristics of low resistivity, strong absorption at ultraviolet wavelengths, high transmission in the visible, high reflectivity in the far-infrared and strong attenuation in the microwave region. However, there is often a trade-off between electrical conductivity and transparency at visible wavelengths for indium tin oxide and other transparent conducting oxides. Here, we report the growth of layers of indium tin oxide nanowires that show optimum electronic and photonic properties and demonstrate their use as fully transparent top contacts in the visible to near-infrared region for light-emitting devices.

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The authors report a chemical process to remove the native oxide on Ge and Bi2Se3 crystals, thus facilitating high-resolution electron beam lithography (EBL) on their surfaces using a hydrogen silsesquioxane (HSQ) resist. HSQ offers the highest resolution of all the commercially available EBL resists. However, aqueous HSQ developers such as NaOH and tetramethylammonium hydroxide have thus far prevented the fabrication of high-resolution structures via the direct application of HSQ to Ge and Bi2Se3, due to the solubility of components of their respective native oxides in these strong aqueous bases. Here we provide a route to the generation of ordered, high-resolution, high-density Ge and Bi2Se3 nanostructures with potential applications in microelectronics, thermoelectric, and photonics devices.                         

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Germanium (Ge) nanowires are of current research interest for high speed nanoelectronic devices due to the lower band gap and high carrier mobility compatible with high K-dielectrics and larger excitonic Bohr radius ensuing a more pronounced quantum confinement effect [1-6]. A general way for the growth of Ge nanowires is to use liquid or a solid growth promoters in a bottom-up approach which allow control of the aspect ratio, diameter, and structure of 1D crystals via external parameters, such as precursor feedstock, temperature, operating pressure, precursor flow rate etc [3, 7-11]. The Solid-phase seeding is preferred for more control processing of the nanomaterials and potential suppression of the unintentional incorporation of high dopant concentrations in semiconductor nanowires and unrequired compositional tailing of the seed-nanowire interface [2, 5, 9, 12]. There are therefore distinct features of the solid phase seeding mechanism that potentially offer opportunities for the controlled processing of nanomaterials with new physical properties. A superior control over the growth kinetics of nanowires could be achieved by controlling the inherent growth constraints instead of external parameters which always account for instrumental inaccuracy. The high dopant concentrations in semiconductor nanowires can result from unintentional incorporation of atoms from the metal seed material, as described for the Al catalyzed VLS growth of Si nanowires [13] which can in turn be depressed by solid-phase seeding. In addition, the creation of very sharp interfaces between group IV semiconductor segments has been achieved by solid seeds [14], whereas the traditionally used liquid Au particles often leads to compositional tailing of the interface [15] . Korgel et al. also described the superior size retention of metal seeds in a SFSS nanowire growth process, when compared to a SFLS process using Au colloids [12]. Here in this work we have used silver and alloy seed particle with different compositions to manipulate the growth of nanowires in sub-eutectic regime. The solid seeding approach also gives an opportunity to influence the crystallinity of the nanowires independent of the substrate. Taking advantage of the readily formation of stacking faults in metal nanoparticles, lamellar twins in nanowires could be formed.

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Conductive AFM and in situ methods were used to determine contact resistance and resistivity of individual Sb2S3 nanowires. Nanowires were deposited on oxidized Si surface for in situ measurements and on Si surface with macroelectrodes for conductive AFM (C-AFM) measurements. Contact resistance was determined by measurement of I(V) characteristics at different distances from the nanowire contact with the macroelectrode and resistivity of nanowires was determined. Sb2S3 is a soft material with low adhesion force to the surface and therefore special precautions were taken during measurements.

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The development of non-equilibrium group IV nanoscale alloys is critical to achieving new functionalities, such as the formation of a direct bandgap in a conventional indirect bandgap elemental semiconductor. Here, we describe the fabrication of uniform diameter, direct bandgap Ge1-xSnx alloy nanowires, with a Sn incorporation up to 9.2[thinsp]at.%, far in excess of the equilibrium solubility of Sn in bulk Ge, through a conventional catalytic bottom-up growth paradigm using noble metal and metal alloy catalysts. Metal alloy catalysts permitted a greater inclusion of Sn in Ge nanowires compared with conventional Au catalysts, when used during vapour-liquid-solid growth. The addition of an annealing step close to the Ge-Sn eutectic temperature (230[thinsp][deg]C) during cool-down, further facilitated the excessive dissolution of Sn in the nanowires. Sn was distributed throughout the Ge nanowire lattice with no metallic Sn segregation or precipitation at the surface or within the bulk of the nanowires. The non-equilibrium incorporation of Sn into the Ge nanowires can be understood in terms of a kinetic trapping model for impurity incorporation at the triple-phase boundary during growth.

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Semiconductor chip packaging has evolved from single chip packaging to 3D heterogeneous system integration using multichip stacking in a single module. One of the key challenges in 3D integration is the high density interconnects that need to be formed between the chips with through-silicon-vias (TSVs) and inter-chip interconnects. Anisotropic Conductive Film (ACF) technology is one of the low-temperature, fine-pitch interconnect method, which has been considered as a potential replacement for solder interconnects in line with continuous scaling of the interconnects in the IC industry. However, the conventional ACF materials are facing challenges to accommodate the reduced pad and pitch size due to the micro-size particles and the particle agglomeration issue. A new interconnect material - Nanowire Anisotropic Conductive Film (NW-ACF), composed of high density copper nanowires of ~ 200 nm diameter and 10-30 µm length that are vertically distributed in a polymeric template, is developed in this work to tackle the constrains of the conventional ACFs and serves as an inter-chip interconnect solution for potential three-dimensional (3D) applications.

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Germanium was of great interest in the 1950’s when it was used for the first transistor device. However, due to the water soluble and unstable oxide it was surpassed by silicon. Today, as device dimensions are shrinking the silicon oxide is no longer suitable due to gate leakage and other low-κ dielectrics such as Al2O3 and HfO2 are being used. Germanium (Ge) is a promising material to replace or integrate with silicon (Si) to continue the trend of Moore’s law. Germanium has better intrinsic mobilities than silicon and is also silicon fab compatible so it would be an ideal material choice to integrate into silicon-based technologies. The progression towards nanoelectronics requires a lot of in depth studies. Dynamic TEM studies allow observations of reactions to allow a better understanding of mechanisms and how an external stimulus may affect a material/structure. This thesis details in situ TEM experiments to investigate some essential processes for germanium nanowire (NW) integration into nanoelectronic devices; i.e. doping and Ohmic contact formation. Chapter 1 reviews recent advances in dynamic TEM studies on semiconductor (namely silicon and germanium) nanostructures. The areas included are nanowire/crystal growth, germanide/silicide formation, irradiation, electrical biasing, batteries and strain. Chapter 2 details the study of ion irradiation and the damage incurred in germanium nanowires. An experimental set-up is described to allow for concurrent observation in the TEM of a nanowire following sequential ion implantation steps. Grown nanowires were deposited on a FIB labelled SiN membrane grid which facilitated HRTEM imaging and facile navigation to a specific nanowire. Cross sections of irradiated nanowires were also performed to evaluate the damage across the nanowire diameter. Experiments were conducted at 30 kV and 5 kV ion energies to study the effect of beam energy on nanowires of varied diameters. The results on nanowires were also compared to the damage profile in bulk germanium with both 30 kV and 5 kV ion beam energies. Chapter 3 extends the work from chapter 2 whereby nanowires are annealed post ion irradiation. In situ thermal annealing experiments were conducted to observe the recrystallization of the nanowires. A method to promote solid phase epitaxial growth is investigated by irradiating only small areas of a nanowire to maintain a seed from which the epitaxial growth can initiate. It was also found that strain in the nanowire greatly effects defect formation and random nucleation and growth. To obtain full recovery of the crystal structure of a nanowire, a stable support which reduces strain in the nanowire is essential as well as containing a seed from which solid phase epitaxial growth can initiate. Chapter 4 details the study of nickel germanide formation in germanium nanostructures. Rows of EBL (electron beam lithography) defined Ni-capped germanium nanopillars were extracted in FIB cross sections and annealed in situ to observe the germanide formation. Chapter 5 summarizes the key conclusions of each chapter and discusses an outlook on the future of germanium nanowire studies to facilitate their future incorporation into nanodevices.

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The dependence of the resistivity with changing diameter of heavily-doped self-seeded germanium nanowires was studied for the diameter range 40 to 11 nm. The experimental data reveal an initial strong reduction of the resistivity with diameter decrease. At about 20 nm a region of slowly varying resistivity emerges with a peak feature around 14 nm. For diameters above 20 nm, nanowires were found to be describable by classical means. For smaller diameters a quantum-based approach was required where we employed the 1D Kubo–Greenwood framework and also revealed the dominant charge carriers to be heavy holes. For both regimes the theoretical results and experimental data agree qualitatively well assuming a spatial spreading of the free holes towards the nanowire centre upon diameter reduction.

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The majority of electrode materials in batteries and related electrochemical energy storage devices are fashioned into slurries via the addition of a conductive additive and a binder. However, aggregation of smaller diameter nanoparticles in current generation electrode compositions can result in non-homogeneous active materials. Inconsistent slurry formulation may lead to inconsistent electrical conductivity throughout the material, local variations in electrochemical response, and the overall cell performance. Here we demonstrate the hydrothermal preparation of Ag nanoparticle (NP) decorated α-AgVO3 nanowires (NWs) and their conversion to tunnel structured β-AgVO3 NWs by annealing to form a uniform blend of intercalation materials that are well connected electrically. The synthesis of nanostructures with chemically bound conductive nanoparticles is an elegant means to overcome the intrinsic issues associated with electrode slurry production, as wire-to-wire conductive pathways are formed within the overall electrode active mass of NWs. The conversion from α-AgVO3 to β-AgVO3 is explained in detail through a comprehensive structural characterization. Meticulous EELS analysis of β-AgVO3 NWs offers insight into the true β-AgVO3 structure and how the annealing process facilitates a higher surface coverage of Ag NPs directly from ionic Ag content within the α-AgVO3 NWs. Variations in vanadium oxidation state across the surface of the nanowires indicate that the β-AgVO3 NWs have a core–shell oxidation state structure, and that the vanadium oxidation state under the Ag NP confirms a chemically bound NP from reduction of diffused ionic silver from the α-AgVO3 NWs core material. Electrochemical comparison of α-AgVO3 and β-AgVO3 NWs confirms that β-AgVO3 offers improved electrochemical performance. An ex situ structural characterization of β-AgVO3 NWs after the first galvanostatic discharge and charge offers new insight into the Li+ reaction mechanism for β-AgVO3. Ag+ between the van der Waals layers of the vanadium oxide is reduced during discharge and deposited as metallic Ag, the vacant sites are then occupied by Li+.

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We studied the electrical transport properties of Au-seeded germanium nanowires with radii ranging from 11 to 80 nm at ambient conditions. We found a non-trivial dependence of the electrical conductivity, mobility and carrier density on the radius size. In particular, two regimes were identified for large (lightly doped) and small (stronger doped) nanowires in which the charge-carrier drift is dominated by electron-phonon and ionized-impurity scattering, respectively. This goes in hand with the finding that the electrostatic properties for radii below ca. 37 nm have quasi one-dimensional character as reflected by the extracted screening lengths.

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Semiconductor nanowires, based on silicon (Si) or germanium (Ge) are leading candidates for many ICT applications, including next generation transistors, optoelectronics, gas and biosensing and photovoltaics. Key to these applications is the possibility to tune the band gap by changing the diameter of the nanowire. Ge nanowires of different diameter have been studied with H termination, but, using ideas from chemistry, changing the surface terminating group can be used to modulate the band gap. In this paper we apply the generalised gradient approximation of density functional theory (GGA-DFT) and hybrid DFT to study the effect of diameter and surface termination using –H, –NH2 and –OH groups on the band gap of (001), (110) and (111) oriented germanium nanowires. We show that the surface terminating group allows both the magnitude and the nature of the band gap to be changed. We further show that the absorption edge shifts to longer wavelength with the –NH2 and –OH terminations compared to the –H termination and we trace the origin of this effect to valence band modifications upon modifying the nanowire with –NH2 or –OH. These results show that it is possible to tune the band gap of small diameter Ge nanowires over a range of ca. 1.1 eV by simple surface chemistry.

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Unique bimodal distributions of single crystal epitaxially grown In2O3 nanodots on silicon are shown to have excellent IR transparency greater than 87% at IR wavelengths up to 4 μm without sacrificing transparency in the visible region. These broadband antireflective nanodot dispersions are grown using a two-step metal deposition and oxidation by molecular beam epitaxy, and backscattered diffraction confirms a dominant (111) surface orientation. We detail the growth of a bimodal size distribution that facilitates good surface coverage (80%) while allowing a significant reduction in In2O3 refractive index. This unique dispersion offers excellent surface coverage and three-dimensional volumetric expansion compared to a thin film, and a step reduction in refractive index compared to bulk active materials or randomly porous composites, to more closely match the refractive index of an electrolyte, improving transparency. The (111) surface orientation of the nanodots, when fully ripened, allows minimum lattice mismatch strain between the In2O3 and the Si surface. This helps to circumvent potential interfacial weakening caused by volume contraction due to electrochemical reduction to lithium, or expansion during lithiation. Cycling under potentiodynamic conditions shows that the transparent anode of nanodots reversibly alloys lithium with good Coulombic efficiency, buffered by co-insertion into the silicon substrate. These properties could potentially lead to further development of similarly controlled dispersions of a range of other active materials to give transparent battery electrodes or materials capable of non-destructive in situ spectroscopic characterization during charging and discharging.

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Gold nanoparticles (Au NPs) with diameters ranging between 5-60 nm have been synthesised in water, and further stabilized with polyethylene glycol-based thiol polymers (mPEG-SH). Successful PEGylation of the Au NPs was confirmed by Dynamic Light scattering (DLS) and Zeta potential measurements. PEG coating of the Au NPs is the key of their colloidal stabilty, and its successful applications. Catalytic efficiency testing of the PEG-AuNPs were carried out on homocoupling of boronic acid. PEG-Au NPs with AuNps diameter < 30 nm were useful as catalyst in water. Finally, the PEG-Au NPs were also shown to be stable in biological fluid and not cytotoxic on B16.F10 cell line, making them attractive for further studies.

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Microwave annealing is an emerging technique for achieving ordered patterns of block copolymer films on substrates. Little is understood about the mechanisms of microphase separation during the microwave annealing process and how it promotes the microphase separation of the blocks. Here, we use controlled power microwave irradiation in the presence of tetrahydrofuran (THF) solvent, to achieve lateral microphase separation in high- lamellar-forming poly(styrene-b-lactic acid) PS-b-PLA. A highly ordered line pattern was formed within seconds on silicon, germanium and silicon on insulator (SOI) substrates. In-situ temperature measurement of the silicon substrate coupled to condition changes during "solvo-microwave" annealing allowed understanding of the processes to be attained. Our results suggest that the substrate has little effect on the ordering process and is essentially microwave transparent but rather, it is direct heating of the polar THF molecules that causes microphase separation. It is postulated that the rapid interaction of THF with microwaves and the resultant temperature increase to 55 degrees C within seconds causes an increase of the vapor pressure of the solvent from 19.8 to 70 kPa. This enriched vapor environment increases the plasticity of both PS and PLA chains and leads to the fast self-assembly kinetics. Comparing the patterns formed on silicon, germanium and silicon on insulator (SOI) and also an in situ temperature measurement of silicon in the oven confirms the significance of the solvent over the role of substrate heating during "solvo-microwave" annealing. Besides the short annealing time which has technological importance, the coherence length is on a micron scale and dewetting is not observed after annealing. The etched pattern (PLA was removed by an Ar/O-2 reactive ion etch) was transferred to the underlying silicon substrate fabricating sub-20 nm silicon nanowires over large areas demonstrating that the morphology is consistent both across and through the film.

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The nanometer range structure produced by thin films of diblock copolymers makes them a great of interest as templates for the microelectronics industry. We investigated the effect of annealing solvents and/or mixture of the solvents in case of symmetric Poly (styrene-block-4vinylpyridine) (PS-b-P4VP) diblock copolymer to get the desired line patterns. In this paper, we used different molecular weights PS-b-P4VP to demonstrate the scalability of such high χ BCP system which requires precise fine-tuning of interfacial energies achieved by surface treatment and that improves the wetting property, ordering, and minimizes defect densities. Bare Silicon Substrates were also modified with polystyrene brush and ethylene glycol self-assembled monolayer in a simple quick reproducible way. Also, a novel and simple in situ hard mask technique was used to generate sub-7nm Iron oxide nanowires with a high aspect ratio on Silicon substrate, which can be used to develop silicon nanowires post pattern transfer.