Part I: High-Voltage MOS Device Design for Improved Static and RF Performance

In this paper, for the first time, the key design parameters of a shallow trench isolation-based drain-extended MOS transistor are discussed for RF power applications in advanced CMOS technologies. The tradeoff between various dc and RF figures of merit (FoMs) is carefully studied using well-calibrated TCAD simulations. This detailed physical insight is used to optimize the dc and RF behavior, and our work also provides a design window for the improvement of dc as well as RF FoMs, without affecting the breakdown voltage. An improvement of 50% in R-ON and 45% in RF gain is achieved at 1 GHz. Large-signal time-domain analysis is done to explore the output power capability of the device.

An Evaluation of Inventory Management and Performance in Indian Machine Tool SMEs: An Exploratory Study

Inventory Management (IM) plays a decisive role in the enhancement of efficiency and competitiveness of manufacturing enterprises. Therefore, major manufacturing enterprises are following IM practices as a strategy to improve efficiency and achieve competitiveness. However, the spread of IM culture among Small and Medium Enterprises (SMEs) is limited due to lack of initiation, expertise and financial limitations in developed countries, leave alone developing countries. With this backdrop, this paper makes an attempt to ascertain the role and importance of IM practices and performance of SMEs in the machine tools industry of Bangalore, India. The relationship between inventory management practices and inventory cost are probed based on primary data gathered from 91 SMEs. The paper brings out that formal IM practices have a positive impact on the inventory performance of SMEs.

Latency, Power and Performance Trade-offs in Network-on-Chips by Link Microarchitecture Exploration

This paper presents a power, latency and throughput trade-off study on NoCs by varying microarchitectural (e.g. pipelining) and circuit level (e.g. frequency and voltage) parameters. We change pipelining depth, operating frequency and supply voltage for 3 example NoCs - 16 node 2D Torus, Tree network and Reduced 2D Torus. We use an in-house NoC exploration framework capable of topology generation and comparison using parameterized models of Routers and links developed in SystemC. The framework utilizes interconnect power and delay models from a low-level modelling tool called Intacte[1]1. We find that increased pipelining can actually reduce latency. We also find that there exists an optimal degree of pipelining which is the most energy efficient in terms of minimizing energy-delay product.

Analysis Of The Energy Quantization Effects On Single Electron Inverter Performance Through Noise Margin Modeling

Possible integration of Single Electron Transistor (SET) with CMOS technology is making the study of semiconductor SET more important than the metallic SET and consequently, the study of energy quantization effects on semiconductor SET devices and circuits is gaining significance. In this paper, for the first time, the effects of energy quantization on SET inverter performance are examined through analytical modeling and Monte Carlo simulations. It is observed that the primary effect of energy quantization is to change the Coulomb Blockade region and drain current of SET devices and as a result affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. It is shown that SET inverter designed with CT : CG = 1/3 (where CT and CG are tunnel junction and gate capacitances respectively) offers maximum robustness against energy quantization.

Performance modelling of a fault-tolerant real-time multiprocessor using stochastic Petri nets

The fault-tolerant multiprocessor (ftmp) is a bus-based multiprocessor architecture with real-time and fault- tolerance features and is used in critical aerospace applications. A preliminary performance evaluation is of crucial importance in the design of such systems. In this paper, we review stochastic Petri nets (spn) and developspn-based performance models forftmp. These performance models enable efficient computation of important performance measures such as processing power, bus contention, bus utilization, and waiting times.

Simplified Mathematical Model for Effects of Freezing on the Low-Temperature Performance of the Lead-Acid Battery

Discharge periods of lead-acid batteries are significantly reduced at subzero centigrade temperatures. The reduction is more than what can he expected due to decreased rates of various processes caused by a lowering of temperature and occurs despite the fact that active materials are available for discharge. It is proposed that the major cause for this is the freezing of the electrolyte. The concentration of acid decreases during battery discharge with a consequent increase in the freezing temperature. A battery freezes when the discharge temperature falls below the freezing temperature. A mathematical model is developed for conditions where charge-transfer reaction is the rate-limiting step. and Tafel kinetics are applicable. It is argued that freezing begins from the midplanes of electrodes and proceeds toward the reservoir in-between. Ionic conduction stops when one of the electrodes freezes fully and the time taken to reach that point, namely the discharge period, is calculated. The predictions of the model compare well to observations made at low current density (C/5) and at -20 and -40 degrees C. At higher current densities, however, diffusional resistances become important and a more complicated moving boundary problem needs to be solved to predict the discharge periods. (C) 2009 The Electrochemical Society.

Role of Melt Convection on the Thermal Performance of Heat Sinks with Phase Change Material

The role of melt convection oil the performance of beat sinks with Phase Change Material (PCM) is presented in this paper. The beat sink consists of aluminum plate fins embedded in PCM and heat flux is supplied from the bottom. The design of such a heat sink requires optimization with respect to its geometrical parameters. The objective of the optimization is to maximize the heat sink operation time for the prescribed heat flux and the critical chip temperature. The parameters considered for optimization are fin number and fill thickness. The height and base plate thickness of heat sink are kept constant in the present analysis. An enthalpy based CFD model is developed, which is capable Of Simulating phase change and associated melt convection. The CFD model is Coupled with Genetic Algorithm (GA) for carrying out the optimization. Two cases are considered, one without melt convection (conduction regime) and the other with convection. It is found that the geometrical optimizations of heat sinks are different for the two cases, indicating the importance of inch convection in the design of heat sinks with PCMs.