Analysis Of The Energy Quantization Effects On Single Electron Inverter Performance Through Noise Margin Modeling

Possible integration of Single Electron Transistor (SET) with CMOS technology is making the study of semiconductor SET more important than the metallic SET and consequently, the study of energy quantization effects on semiconductor SET devices and circuits is gaining significance. In this paper, for the first time, the effects of energy quantization on SET inverter performance are examined through analytical modeling and Monte Carlo simulations. It is observed that the primary effect of energy quantization is to change the Coulomb Blockade region and drain current of SET devices and as a result affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. It is shown that SET inverter designed with CT : CG = 1/3 (where CT and CG are tunnel junction and gate capacitances respectively) offers maximum robustness against energy quantization.

Two stage Gifford-McMahon cycle cryorefrigerator operating at 20 K

A two stage Gifford-McMahon cycle cryorefrigerator operating at 20 K is described. This refrigerator uses a very simple ‘spool valve’ and a modified indigenous compressor to compress helium gas. This cryorefrigerator reaches a lowest temperature of 15.5 K; it takes ≈ 50 min to reach 20 K and the cooling capacity is ≈ 2.5 W at 25 K. The cool-down characteristics and load characteristics are presented in graphical form. The effect of changing the operating pressure ratio and the second stage regenerator matrix size are also reported. Pressure-volume (P-V) diagrams obtained at various temperatures indicate that P-V losses form the major fraction of the total losses and this becomes more pronounced as the temperature is decreased. A heat balance analysis shows the relative magnitudes of various losses.

Nonlinear Control Design for an Air-breathing Engine with State Estimation

A nonlinear control design approach is presented in this paper for a challenging application problem of ensuring robust performance of an air-breathing engine operating at supersonic speed. The primary objective of control design is to ensure that the engine produces the required thrust that tracks the commanded thrust as closely as possible by appropriate regulation of the fuel flow rate. However, since the engine operates in the supersonic range, an important secondary objective is to ensure an optimal location of the shock in the intake for maximum pressure recovery with a sufficient margin. This is manipulated by varying the throat area of the nozzle. The nonlinear dynamic inversion technique has been successfully used to achieve both of the above objectives. In this problem, since the process is faster than the actuators, independent control designs have also been carried out for the actuators as well to assure the satisfactory performance of the system. Moreover, an extended Kalman Filter based state estimation design has been carried out both to filter out the process and sensor noises as well as to make the control design operate based on output feedback. Promising simulation results indicate that the proposed control design approach is quite successful in obtaining robust performance of the air-breathing system.

A 100MHz to 1GHz, 0.35V to 1.5V supply 256 x 64 SRAM mock using symmetrized 9T SRAM cell with controlled read

In this paper, we present Dynamic Voltage and Frequency Managed 256 x 64 SRAM block in 65nm technology, for frequency ranging from 100MHz to 1GHz. The total energy is minimized for any operating frequency in the above range and leakage energy is minimized during standby mode. Since noise margin of SRAM cell deteriorates at low voltages, we propose Static Noise Margin improvement circuitry, which symmetrizes the SRAM cell by controlling the body bias of pull down NMOS transistor. We used a 9T SRAM cell that isolates Read and Hold Noise Margin and has less leakage. We have implemented an efficient technique of pushing address decoder into zigzag-super-cut-off in stand-by mode without affecting its performance in active mode of operation. The Read Bit Line (RBL) voltage drop is controlled and pre-charge of bit lines is done only when needed for reducing power wastage.

Assessment of SET Logic Robustness Through Noise Margin Modeling

A compact model for noise margin (NM) of single-electron transistor (SET) logic is developed, which is a function of device capacitances and background charge (zeta). Noise margin is, then, used as a metric to evaluate the robustness of SET logic against background charge, temperature, and variation of SET gate and tunnel junction capacitances (CG and CT). It is shown that choosing alpha=CT/CG=1/3 maximizes the NM. An estimate of the maximum tolerable zeta is shown to be equal to plusmn0.03 e. Finally, the effect of mismatch in device parameters on the NM is studied through exhaustive simulations, which indicates that a isin [0.3, 0.4] provides maximum robustness. It is also observed that mismatch can have a significant impact on static power dissipation.

Kernels for large margin time-series classification

In this paper we propose a novel family of kernels for multivariate time-series classification problems. Each time-series is approximated by a linear combination of piecewise polynomial functions in a Reproducing Kernel Hilbert Space by a novel kernel interpolation technique. Using the associated kernel function a large margin classification formulation is proposed which can discriminate between two classes. The formulation leads to kernels, between two multivariate time-series, which can be efficiently computed. The kernels have been successfully applied to writer independent handwritten character recognition.

Modeling and Analysis of Noise Margin in SET Logic

In this paper the static noise margin for SET (single electron transistor) logic is defined and compact models for the noise margin are developed by making use of the MIB (Mahapatra-Ionescu-Banerjee) model. The variation of the noise margin with temperature and background charge is also studied. A chain of SET inverters is simulated to validate the definition of various logic levels (like VIH, VOH, etc.) and noise margin. Finally the noise immunity of SET logic is compared with current CMOS logic.

Heat transfer in plane Couette flow of a rarefied gas using Bhatnagar-Gross-Krook model

Using the linearized BGK model and the method of moments of half-range distribution functions the temperature jumps at two plates are determined, and it is found that the results are in fair agreement with those of Gross and Ziering, and Ziering.

Investigations of a two-stage pulse tube cryocooler operating down to 2.5K

A two-stage pulse tube cryocooler (PTC) which produces a no-load temperature of similar to 2.5 K in its second stage at an operating frequency of 1.6 Hz has been designed and fabricated. The second stage of the system provides a refrigeration power of similar to 250 mW at 5.0 K. The system uses stainless steel meshes (mesh size 200) along with lead (Pb) granules and combinations of Pb, Er3Ni, and HoCu2 as the first and second stage regenerator materials, respectively. Experimental studies have been carried out on different pulse tube configurations by varying the dimensions of the pulse tubes and regenerators to arrive at the best one, which leads to the lowest no-load second stage cold head temperature. Using this configuration, detailed experimental studies have been conducted by varying the volume percentage ratios of the second stage regenerator materials such as HoCu2, Er3Ni, and Pb (with an average grain size of similar to 250 mu m). This article presents the results of our experimental studies on cryocoolers with the regenerator material arranged in layered structures. Comparative studies have also been presented for specific cases where the regenerator materials are arranged as a homogeneous mixture in the second stage. The experimental results clearly indicate that the design of PTCs should use only layered structures of regenerator materials and not homogenous mixtures.

Performance study of high operating temperature HgCdTe mid wave infrared detector through numerical modeling

The design of present generation uncooled Hg1-xCdxTe infrared photon detectors relies on complex heterostructures with a basic unit cell of type (n) under bar (+)/pi/(p) under bar (+). We present an analysis of double barrier (n) under bar (+)/pi/(p) under bar (+) mid wave infrared (x = 0.3) HgCdTe detector for near room temperature operation using numerical computations. The present work proposes an accurate and generalized methodology in terms of the device design, material properties, and operation temperature to study the effects of position dependence of carrier concentration, electrostatic potential, and generation-recombination (g-r) rates on detector performance. Position dependent profiles of electrostatic potential, carrier concentration, and g-r rates were simulated numerically. Performance of detector was studied as function of doping concentration of absorber and contact layers, width of both layers and minority carrier lifetime. Responsivity similar to 0.38 A W-1, noise current similar to 6 x 10(-14) A/Hz(1/2) and D* similar to 3.1 x 10(10)cm Hz(1/2) W-1 at 0.1 V reverse bias have been calculated using optimized values of doping concentration, absorber width and carrier lifetime. The suitability of the method has been illustrated by demonstrating the feasibility of achieving the optimum device performance by carefully selecting the device design and other parameters. (C) 2010 American Institute of Physics. doi:10.1063/1.3463379]

Evaluation and improvement of generators reactive power margins in interconnected power systems

The amount of reactive power margin available in a system determines its proximity to voltage instability under normal and emergency conditions. More the reactive power margin, better is the systems security and vice-versa. A hypothetical way of improving the reactive margin of a synchronous generator is to reduce the real power generation within its mega volt-ampere (MVA) ratings. This real power generation reduction will affect its power contract agreements entered in the electricity market. Owing to this, the benefit that the generator foregoes will have to be compensated by paying them some lost opportunity cost. The objective of this study is three fold. Firstly, the reactive power margins of the generators are evaluated. Secondly, they are improved using a reactive power optimization technique and optimally placed unified power flow controllers. Thirdly, the reactive power capacity exchanges along the tie-lines are evaluated under base case and improved conditions. A detailed analysis of all the reactive power sources and sinks scattered throughout the network is carried out in the study. Studies are carried out on a real life, three zone, 72-bus equivalent Indian southern grid considering normal and contingency conditions with base case operating point and optimised results presented.

An improved-performance liquid-feed solid-polymer-electrolyte direct methanol fuel cell operating at near-ambient conditions

Results on the performance of a 25 cm(2) liquid-feed solid-polymer-electrolyte direct methanol fuel cell (SPE-DMFC), operating under near-ambient conditions, are reported. The SPE-DMFC can yield a maximum power density of c. 200 mW cm(-2) at 90 C while operating with 1 M aqueous methanol and oxygen under ambient pressure. While operating the SPE-DMFC under similar conditions with air, a maximum power density of ca. 100 mW cm(-2) is achieved. Analysis of the electrode reaction kinetics parameters on the methanol electrode suggests that the reaction mechanism for methanol oxidation remains invariant with temperature. Durability data on the SPE-DMFC at an operational current density of 100 mA cm(-2) have also been obtained.

Design and Implementation of a Flexible and Memory Efficient Operating System for Sensor Nodes

Sensor network nodes exhibit characteristics of both embedded systems and general-purpose systems.A sensor network operating system is a kind of embedded operating system, but unlike a typical embedded operating system, sensor network operatin g system may not be real time, and is constrained by memory and energy constraints. Most sensor network operating systems are based on event-driven approach. Event-driven approach is efficient in terms of time and space.Also this approach does not require a separate stack for each execution context. But using this model, it is difficult to implement long running tasks, like cryptographic operations. A thread based computation requires a separate stack for each execution context, and is less efficient in terms of time and space. In this paper, we propose a thread based execution model that uses only a fixed number of stacks. In this execution model, the number of stacks at each priority level are fixed. It minimizes the stack requirement for multi-threading environment and at the same time provides ease of programming. We give an implementation of this model in Contiki OS by separating thread implementation from protothread implementation completely. We have tested our OS by implementing a clock synchronization protocol using it.