RF Sputtered Er2O3 Thin Films as High-k Gate Dielectrics for Germanium MOS Devices

We report the material and electrical properties of Erbium Oxide (Er2O3) thin films grown on n-Ge (100) by RF sputtering. The properties of the films are correlated with the processing conditions. The structural characterization reveals that the films annealed at 550 degrees C, has densified as compared to the as-grown ones. Fixed oxide charges and interface charges, both of the order of 10(13)/cm(2) is observed.

Influence of O-2 flow rate on HfO2 gate dielectrics for back-gated graphene transistors

HfO2 thin films deposited on Si substrate using electron beam evaporation, are evaluated for back-gated graphene transistors. The amount of O-2 flow rate, during vaporation is optimized for 35 nm thick HfO2 films, to achieve the best optical, chemical and electrical properties. It has been observed that with increasing oxygen flow rate, thickness of the films increased and refractive index decreased due to increase in porosity resulting from the scattering of the evaporant. The films deposited at low O-2 flow rates (1 and 3 SCCM) show better optical and compositional properties. The effects of post-deposition annealing and post-metallization annealing in forming gas ambience (FGA) on the optical and electrical properties of the films have been analyzed. The film deposited at 3 SCCM O-2 flow rate shows the best properties as measured on MOS capacitors. To evaluate the performance of device properties, back-gated bilayer graphene transistors on HfO2 films deposited at two O-2 flow rates of 3 and 20 SCCM have been fabricated and characterized. The transistor with HfO2 film deposited at 3 SCCM O-2 flow rate shows better electrical properties consistent with the observations on MOS capacitor structures. This suggests that an optimum oxygen pressure is necessary to get good quality films for high performance devices.

Growth of TiO2 Films by RF Magnetron Sputtering for MOS Gate Dielectrics: Influence of Substrate Temperature

Titanium dioxide thin films were deposited by RF reactive magnetron sputtering technique on p-type silicon(100) substrates held at temperatures in the range 303-673 K. The influence of substrate temperature on the core level binding energies, chemical bonding configuration, crystallographic structure and dielectric properties was investigated. X-ray photoelectron spectroscopy studies and Fourier transform infrared transmittance data confirmed the formation of stoichiometric films with anatase phase at a substrate temperature of 673 K. The films formed at 303 K were nanocrystalline with amorphous matrix while those deposited at 673 K were transformed in to crystalline phase and growth of grains in pyramidal like structure as confirmed by X-ray diffraction and atomic force microscopy respectively. Metal-oxide-semiconductor capacitors were fabricated with the configuration of Al/TiO2/Si structures. The current voltage, capacitance voltage and conductance voltage characteristics were studied to understand the electrical conduction and dielectric properties of the MOS devices. The leakage current density (at gate voltage of 2 V) decreased from 2.2 x 10(-6) to 1.7 x 10(-7) A/cm(2), the interface trap density decreased from 1.2 x 10(13) to 2.1 x 10(12) cm(-2) eV(-1) and the dielectric constant increased from 14 to 36 with increase of substrate temperature from 303 to 673 K.

Low temperature solution processed high-kappa ZrO2 gate dielectrics for nanoelectonics

The high-kappa gate dielectrics, specifically amorphous films offer salient features such as exceptional mechanical flexibility, smooth surfaces and better uniformity associated with low leakage current density. In this work, similar to 35 nm thick amorphous ZrO2 films were deposited on silicon substrate at low temperature (300 degrees C, 1 h) from facile spin-coating method and characterized by various analytical techniques. The X-ray diffraction and X-ray photoelectron spectroscopy reveal the formation of amorphous phase ZrO2, while ellipsometry analysis together with the Atomic Force Microscope suggest the formation of dense film with surface roughness of 1.5 angstrom, respectively. The fabricated films were integrated in metal-oxide-semiconductor (MOS) structures to check the electrical capabilities. The oxide capacitance (C-ox), flat band capacitance (C-FB), flat band voltage (V-FB), dielectric constant (kappa) and oxide trapped charges (Q(ot)) extracted from high frequency (1 MHz) C-V curve are 186 pF, 104 pF, 0.37V, 15 and 2 x 10(-11) C, respectively. The small flat band voltage 0.37V, narrow hysteresis and very little frequency dispersion between 10 kHz-1 MHz suggest an excellent a-ZrO2/Si interface with very less trapped charges in the oxide. The films exhibit a low leakage current density 4.7 x 10(-9)A/cm(2) at 1V. In addition, the charge transport mechanism across the MOSC is analyzed and found to have a strong bias dependence. The space charge limited conduction mechanism is dominant in the high electric field region (1.3-5 V) due to the presence of traps, while the trap-supported tunneling is prevailed in the intermediate region (0.35-1.3 V). Low temperature solution processed ZrO2 thin films obtained are of high quality and find their importance as a potential dielectric layer on Si and polymer based flexible electronics. (C) 2016 Published by Elsevier B.V.

Effect of Post-Metallization Hydrogen Annealing on C-V Characteristic of Zirconia Grown Using Atomic Layer Deposition

Substantial amount of fixed charge present in most of the alternative gate dielectrics gives rise to large shifts in the flat-band voltage (VFB) and charge trapping and de-trapping causes hysterectic changes on voltage cycling. Both phenomena affect stable and reliable transistor operation. In this paper we have studied for the first time the effect of post-metallization hydrogen annealing on the C-V curve of MOS capacitors employing zirconia, one of the most promising gate dielectric. Samples were annealed in hydrogen ambient for up to 30 minutes at different temperatures ranging from room temperature to 400°C. C-V measurements were done after annealing at each temperature and the hysteresis width was calculated from the C-V curves. A minimum hysteresis width of ∼35 mV was observed on annealing the sample at 200°C confirming the excellent suitability of this dielectric

Structural, electrical and dielectric properties of sputtered TiO2 films for Al/TiO2/Si capacitors

Metal-oxide semiconductor capacitors based on titanium dioxide (TiO2) gate dielectrics were prepared by RF magnetron sputtering technique. The deposited films were post-annealed at temperatures in the range 773-1173 K in air for 1 hour. The effect of annealing temperature on the structural properties of TiO2 films was investigated by X-ray diffraction and Raman spectroscopy, the surface morphology was studied by atomic force microscopy (AFM) and the electrical properties of Al/TiO2/p-Si structure were measured recording capacitance-voltage and current-voltage characteristics. The as-deposited films and the films annealed at temperatures lower than 773 K formed in the anatase phase, while those annealed at temperatures higher than 973 K were made of mixtures of the rutile and anatase phases. FTIR analysis revealed that, in the case of films annealed at 1173 K, an interfacial layer had formed, thereby reducing the dielectric constant. The dielectric constant of the as-deposited films was 14 and increased from 25 to 50 with increases in the annealing temperature from 773 to 973 K. The leakage current density of as-deposited films was 1.7 x 10(-5) and decreased from 4.7 X 10(-6) to 3.5 x 10(-9) A/cm(2) with increases in the annealing temperature from 773 to 1173 K. The electrical conduction in the Al/TiO2/p-Si structures was studied on the basis of the plots of Schottky emission, Poole-Frenkel emission and Fowler-Nordheim tunnelling. The effect of structural changes on the current-voltage and capacitance-voltage characteristics of Al/TiO2/p-Si capacitors was also discussed.

Performance and reliability of Gd2O3 and stacked Gd2O3-Eu2O3 metal-insulator-metal capacitors

Gd2O3-based metal-insulator-metal capacitors have been characterized with single layer (Gd2O3) and bilayer (Gd2O3/Eu2O3 and Eu2O3/Gd2O3) stacks for analog and DRAM applications. Although single layer Gd2O3 capacitors provide highest capacitance density (15 fF/mu m(2)), they suffer from high leakage current density, poor capacitance density-voltage linearity, and reliability. The stacked dielectrics help to reduce leakage current density (1.2x10(-5) A/cm(2) and 2.7 x 10(-5) A/cm(2) for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at -1 V), improve quadratic voltage coefficient of capacitance (331 ppm/V-2 and 374 ppm/V-2 for Gd2O3/Eu2O3 and Eu2O3/Gd2O3, respectively, at 1 MHz), and improve reliability, with a marginal reduction in capacitance density. This is attributed to lower trap heights as determined from Poole-Frenkel conduction mechanism, and lower defect density as determined from electrode polarization model.

Modeling of Channel Potential and Subthreshold Slope of Symmetric Double-Gate Transistor

A new physically based classical continuous potential distribution model, particularly considering the channel center, is proposed for a short-channel undoped body symmetrical double-gate transistor. It involves a novel technique for solving the 2-D nonlinear Poisson's equation in a rectangular coordinate system, which makes the model valid from weak to strong inversion regimes and from the channel center to the surface. We demonstrated, using the proposed model, that the channel potential versus gate voltage characteristics for the devices having equal channel lengths but different thicknesses pass through a single common point (termed ``crossover point''). Based on the potential model, a new compact model for the subthreshold swing is formulated. It is shown that for the devices having very high short-channel effects (SCE), the effective subthreshold slope factor is mainly dictated by the potential close to the channel center rather than the surface. SCEs and drain-induced barrier lowering are also assessed using the proposed model and validated against a professional numerical device simulator.

Within-Die Gate Delay Variability Measurement using Re-configurable Ring Oscillator

We report a circuit technique to measure the on-chip delay of an individual logic gate (both inverting and non-inverting) in its unmodified form using digitally reconfigurable ring oscillator (RO). Solving a system of linear equations with different configuration setting of the RO gives delay of an individual gate. Experimental results from a test chip in 65nm process node show the feasibility of measuring the delay of an individual inverter to within 1pS accuracy. Delay measurements of different nominally identical inverters in close physical proximity show variations of up to 26% indicating the large impact of local or within-die variations.

Within-Die Gate Delay Variability Measurement Using Reconfigurable Ring Oscillator

We report the design and characterization of a circuit technique to measure the on-chip delay of an individual logic gate (both inverting and noninverting) in its unmodified form. The test circuit comprises of digitally reconfigurable ring oscillator (RO). The gate under test is embedded in each stage of the ring oscillator. A system of linear equations is then formed with different configuration settings of the RO, relating the individual gate delay to the measured period of the RO, whose solution gives the delay of the individual gates. Experimental results from a test chip in 65-nm process node show the feasibility of measuring the delay of an individual inverter to within 1 ps accuracy. Delay measurements of different nominally identicall inverters in close physical proximity show variations of up to 28% indicating the large impact of local variations. As a demonstration of this technique, we have studied delay variation with poly-pitch, length of diffusion (LOD) and different orientations of layout in silicon. The proposed technique is quite suitable for early process characterization, monitoring mature process in manufacturing and correlating model-to-hardware.

The world of perovskite oxides: From dielectrics to superconductors

Some aspects of the properties of oxides of perovskite and K2 NiF4 structures are presented. Some of the interesting aspects discussed are intergrowths, orthorhombicity of superconducting cuprates and importance of holes on oxygen.

EPR studies on donor doped BaTiO3 grain boundary layer ceramic dielectrics

Donor doped BaTiO3 ceramics become insulating5 under controlled conditions with effective dielectric constants >10. The changes in EPR signals indicate that a certain fraction of the donor doped BaTiO3 is cubic even at room temperature and that the cubic fraction increases with the donor content. X-ray powder diffraction data support the EPR results. The coexistence of both the phases over a range of temperature is characteristic of diffused phase transition. The effect of grain size variation on EPR signal intensities indicate that the boundary layers surrounding the grains may constitute the cubic phase as a result of higher Ba-vacancies and donor contents at the grain boundary layer than in the bulk. Since the acceptor states arising from the Ba-vacancies and the impurities are activated in the cubic phase, they capture electrons from the conduction band, rendering the cubic phase electrically more insulating than the semiconductive tetragonal grain interiors. Thus, the cubic grain boundary layers act as effective dielectric media where the field tends to concentrate.

Brillouin Scattering by Phonons Renormalized by Two-Magnon Excitations in Ferromagnetic Dielectrics

Brillouin scattering by one-phonon-two-magnon interacting excitations in ferromagnetic dielectrics is discussed. The basic light scattering mechanism is taken to be the modulation of the density-dependent optical dielectric polarizability of the medium by the dynamic strain field generated by the longitudinal acoustic (LA) phonons. The renormalization effects arising from the scattering of phonons by the two-magnon creation-annihilation processes have, however, been taken into account. Via these interactions, the Brillouin components corresponding to the two-magnon excitations are reflected indirectly in the spectrum of the phonon scattered light as line-broadening of the otherwise relatively sharp Brillouin doublet. The present mechanism is shown to be dominant in a clean saturated ferromagnetic dielectric with large magneto-strictive coupling constant, and with the magnetic ions in the orbitally quenched states. Following the linear response theory, an expression has been derived for the spectral density of the scattered light as a function of temperature, scattering angle, and the strength of the externally applied magnetic field. Some estimates are given for the line-width and line-shift of the Brillouin components for certain typical choice of parameters involved. The results are discussed in relation to some available calculations on the ultrasonic attenuation in ferromagnetic insulators at low temperatures.

A New Threshold Voltage Model for Omega Gate Cylindrical Nanowire Transistor

In this work, for the first time, we present a physically based analytical threshold voltage model for omega gate silicon nanowire transistor. This model is developed for long channel cylindrical body structure. The potential distribution at each and every point of the of the wire is derived with a closed form solution of two dimensional Poisson's equation, which is then used to model the threshold voltage. Proposed model can be treated as a generalized model, which is valid for both surround gate and semi-surround gate cylindrical transistors. The accuracy of proposed model is verified for different device geometry against the results obtained from three dimensional numerical device simulators and close agreement is observed.

Phase change on transmission of microwaves through metal disc delay dielectrics

Expressions for the phase change Φ suffered by microwaves when transmitted through an artificial dielectric composed of metallic discs arranged in a three-dimensional array have been derived with different approaches as follows (i) molecular theory, (ii) electromagnetic theory and (iii) transmission line theory. The phase change depends on the distance t that the wave traverses inside the dielectric and also the spacing d between centre to centre of any two adjacent discs in the three principal directions. Molecular theory indicates Φ as an increasing function of t, whereas, the other two theories indicate Φ as an oscillatory function of t. The transmission line theory also exhibits Φ to be real or imaginary depending on t. Experimental values of Φ as a function of t have been obtained with the help of a microwave (3·2 cms wavelength) interferometer for two dielectrics having d as 1·91 cms and 2·22 cms respectively.