Optimal Exact-Regenerating Codes for Distributed Storage at the MSR and MBR Points via a Product-Matrix Construction

Regenerating codes are a class of distributed storage codes that allow for efficient repair of failed nodes, as compared to traditional erasure codes. An [n, k, d] regenerating code permits the data to be recovered by connecting to any k of the n nodes in the network, while requiring that a failed node be repaired by connecting to any d nodes. The amount of data downloaded for repair is typically much smaller than the size of the source data. Previous constructions of exact-regenerating codes have been confined to the case n = d + 1. In this paper, we present optimal, explicit constructions of (a) Minimum Bandwidth Regenerating (MBR) codes for all values of [n, k, d] and (b) Minimum Storage Regenerating (MSR) codes for all [n, k, d >= 2k - 2], using a new product-matrix framework. The product-matrix framework is also shown to significantly simplify system operation. To the best of our knowledge, these are the first constructions of exact-regenerating codes that allow the number n of nodes in the network, to be chosen independent of the other parameters. The paper also contains a simpler description, in the product-matrix framework, of a previously constructed MSR code with [n = d + 1, k, d >= 2k - 1].

Long term stability studies of particle storage rings using polynomial Maps

Long-term stability studies of particle storage rings can not be carried out using conventional numerical integration algorithms. We require symplectic integration algorithms which are both fast and accurate. In this paper, we study a symplectic integration method wherein the sym-plectic map representing the Hamiltonian system is refactorized using polynomial symplectic maps. This method is used to perform long term integration on a particle storage ring.

V(2)O(5)-Anchored Carbon Nanotubes for Enhanced Electrochemical Energy Storage

Functionalized multiwalled carbon nanotubes (CNTs) are coated with a 4-5 nm thin layer of V(2)O(5) by controlled hydrolysis of vanadium alkoxide. The resulting V(2)O(5)/CNT composite has been investigated for electrochemical activity with lithium ion, and the capacity value shows both faradaic and capacitive (nonfaradaic) contributions. At high rate (1 C), the capacitive behavior dominates the intercalation as 2/3 of the overall capacity value out of 2700 C/g is capacitive, while the remaining is due to Li-ion intercalation. These numbers are in agreement with the Trasatti plots and are corroborated by X-ray photoelectron spectroscopy (XPS) studies on the V(2)O(5)/CNTs electrode, which show 85% of vanadium in the +4 oxidation state after the discharge at 1 C rate. The cumulative high-capacity value is attributed to the unique property of the nano V(2)O(5)/CNTs composite, which provides a short diffusion path for Lit-ions and an easy access to vanadium redox centers besides the high conductivity of CNTs. The composite architecture exhibits both high power density and high energy density, stressing the benefits of using carbon substrates to design high performance supercapacitor electrodes.

Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles as charge storage nodes

We propose robust and scalable processes for the fabrication of floating gate devices using ordered arrays of 7 nm size gold nanoparticles as charge storage nodes. The proposed strategy can be readily adapted for fabricating next generation (sub-20 nm node) non-volatile memory devices.

Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor

A generalized power tracking algorithm that minimizes power consumption of digital circuits by dynamic control of supply voltage and the body bias is proposed. A direct power monitoring scheme is proposed that does not need any replica and hence can sense total power consumed by load circuit across process, voltage, and temperature corners. Design details and performance of power monitor and tracking algorithm are examined by a simulation framework developed using UMC 90-nm CMOS triple well process. The proposed algorithm with direct power monitor achieves a power savings of 42.2% for activity of 0.02 and 22.4% for activity of 0.04. Experimental results from test chip fabricated in AMS 350 nm process shows power savings of 46.3% and 65% for load circuit operating in super threshold and near sub-threshold region, respectively. Measured resolution of power monitor is around 0.25 mV and it has a power overhead of 2.2% of die power. Issues with loop convergence and design tradeoff for power monitor are also discussed in this paper.

Performance analysis for geometrical attack on digital image watermarking

We present a technique for irreversible watermarking approach robust to affine transform attacks in camera, biomedical and satellite images stored in the form of monochrome bitmap images. The watermarking approach is based on image normalisation in which both watermark embedding and extraction are carried out with respect to an image normalised to meet a set of predefined moment criteria. The normalisation procedure is invariant to affine transform attacks. The result of watermarking scheme is suitable for public watermarking applications, where the original image is not available for watermark extraction. Here, direct-sequence code division multiple access approach is used to embed multibit text information in DCT and DWT transform domains. The proposed watermarking schemes are robust against various types of attacks such as Gaussian noise, shearing, scaling, rotation, flipping, affine transform, signal processing and JPEG compression. Performance analysis results are measured using image processing metrics.

A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test

A method of precise measurement of on-chip analog voltages in a mostly-digital manner, with minimal overhead, is presented. A pair of clock signals is routed to the node of an analog voltage. This analog voltage controls the delay between this pair of clock signals, which is then measured in an all-digital manner using the technique of sub-sampling. This sub-sampling technique, having measurement time and accuracy trade-off, is well suited for low bandwidth signals. This concept is validated by designing delay cells, using current starved inverters in UMC 130nm CMOS process. Sub-mV accuracy is demonstrated for a measurement time of few seconds.

Filling Characteristics for an Activated Carbon Based Adsorbed Natural Gas Storage System

The storage capacity of an activated carbon bed is studied using a 2D transport model with constant inlet flow conditions. The predicted filling times and variation in bed pressure and temperature are in good agreement with experimental observations obtained using a 1.82 L prototype ANG storage cylinder. Storage efficiencies based on the maximum achievable V/V (volume of gas/volume of container) and filling times are used to quantify the performance of the charging process. For the high permeability beds used in the experiments, storage efficiencies are controlled by the rate of heat removal. Filling times, defined as the time at which the bed pressure reaches 3.5 MPa, range from 120 to 3.4 min for inlet flow rates of 1.0 L min(-1) and 30.0 L min(-1), respectively. The corresponding storage efficiencies, eta(s), vary from 90% to 76%, respectively. Simulations with L/D ratios ranging from 0.35 to 7.8 indicate that the storage efficiencies can be improved with an increase in the LID ratios and/or with water cooled convection. Thus for an inlet flow rate of 30.0 L min(-1), an eta(s) value of 90% can be obtained with water cooling for an L/D ratio of 7.8 and a filling time of a few minutes. In the absence of water cooling the eta(s) value reduces to 83% at the same L/D ratio. Our study suggests that with an appropriate choice of cylinder dimensions, solutions based on convective cooling during adsorptive storage are possible with some compromise in the storage capacity.

Enhancement of charge and energy storage in sol-gel derived pure and La-modified PbZrO3 thin films

Antiferroelectric lanthanum-modified PbZrO3 thin films with La contents between 0 and 6 at. % have been deposited on Pt(111)/Ti/SiO2/Si substrate by sol-gel route. On the extent of La-modification, maximum polarization (Pmax) and recoverable energy density (W) have been enhanced followed by their subsequent reduction. A maximum Pmax ( ∼ 0.54 C/m2 at ∼ 60 MV/m) as well as a maximum W ( ∼ 14.9 J/cc at ∼ 60 MV/m) have been achieved on 5% La modification. Both Pmax and W have been found to be strongly dependent on La-induced crystallographic orientations.

Digital Simulation of Field-Oriented Control of Induction Motor

This paper describes the simulation of a control scheme using the principle of field orientation for the control of a voltage source inverter-fed induction motor. The control principle is explained, followed by an algorithm to simulate various components of the system in the digital computer. The dynamic response of the system for the load disturbance and set-point variations have been studied. Also, the results of the simulation showing the behavior of field coordinates for such disturbances are given.

Digital Dead Time Logic and Protection Circuitry for PWM Voltage Source Converters

Power semiconductor devices have finite turn on and turn off delays that may not be perfectly matched. In a leg of a voltage source converter, the simultaneous turn on of one device and the turn off of the complementary device will cause a DC bus shoot through, if the turn off delay is larger than the turn on delay time. To avoid this situation it is common practice to blank the two complementary devices in a leg for a small duration of time while switching, which is called dead time. This paper proposes a logic circuit for digital implementation required to control the complementary devices of a leg independently and at the same time preventing cross conduction of devices in a leg, and while providing accurate and stable dead time. This implementation is based on the concept of finite state machines. This circuit can also block improper PWM pulses to semiconductor switches and filters small pulses notches below a threshold time width as the narrow pulses do not provide any significant contribution to average pole voltage, but leads to increased switching loss. This proposed dead time logic has been implemented in a CPLD and is implemented in a protection and delay card for 3- power converters.

Electrical-energy storage in hybrid ultracapacitors

There are several ways of storing electrical energy in chemical and physical forms and retrieving it on demand, and ultracapacitors are one among them. This article presents the taxonomy of ultracapacitor and describes various types of rechargeable-battery electrodes that can be used to realize the hybrid ultracapacitors in conjunction with a high-surface-area-graphitic-carbon electrode. While the electrical energy is stored in a battery electrode in chemical form, it is stored in physical form as charge in the electrical double-layer formed between the electrolyte and the high-surface-area-carbon electrodes. This article discusses various types of hybrid ultracapacitors along with the possible applications.

Automatic Recognition of Facial Features and Landmarking of Digital Human Head

Ergonomic design of products demands accurate human dimensions-anthropometric data. Manual measurement over live subjects, has several limitations like long time, required presence of subjects for every new measurement, physical contact etc. Hence the data currently available is limited and anthropometric data related to facial features is difficult to obtain. In this paper, we discuss a methodology to automatically detect facial features and landmarks from scanned human head models. Segmentation of face into meaningful patches corresponding to facial features is achieved by Watershed algorithms and Mathematical Morphology tools. Many Important physiognomical landmarks are identified heuristically.

Error, Confidence, and Cost in Engineering Computations

The questions that one should answer in engineering computations - deterministic, probabilistic/randomized, as well as heuristic - are (i) how good the computed results/outputs are and (ii) how much the cost in terms of amount of computation and the amount of storage utilized in getting the outputs is. The absolutely errorfree quantities as well as the completely errorless computations done in a natural process can never be captured by any means that we have at our disposal. While the computations including the input real quantities in nature/natural processes are exact, all the computations that we do using a digital computer or are carried out in an embedded form are never exact. The input data for such computations are also never exact because any measuring instrument has inherent error of a fixed order associated with it and this error, as a matter of hypothesis and not as a matter of assumption, is not less than 0.005 per cent. Here by error we imply relative error bounds. The fact that exact error is never known under any circumstances and any context implies that the term error is nothing but error-bounds. Further, in engineering computations, it is the relative error or, equivalently, the relative error-bounds (and not the absolute error) which is supremely important in providing us the information regarding the quality of the results/outputs. Another important fact is that inconsistency and/or near-consistency in nature, i.e., in problems created from nature is completely nonexistent while in our modelling of the natural problems we may introduce inconsistency or near-inconsistency due to human error or due to inherent non-removable error associated with any measuring device or due to assumptions introduced to make the problem solvable or more easily solvable in practice. Thus if we discover any inconsistency or possibly any near-inconsistency in a mathematical model, it is certainly due to any or all of the three foregoing factors. We do, however, go ahead to solve such inconsistent/near-consistent problems and do get results that could be useful in real-world situations. The talk considers several deterministic, probabilistic, and heuristic algorithms in numerical optimisation, other numerical and statistical computations, and in PAC (probably approximately correct) learning models. It highlights the quality of the results/outputs through specifying relative error-bounds along with the associated confidence level, and the cost, viz., amount of computations and that of storage through complexity. It points out the limitation in error-free computations (wherever possible, i.e., where the number of arithmetic operations is finite and is known a priori) as well as in the usage of interval arithmetic. Further, the interdependence among the error, the confidence, and the cost is discussed.