A Front end Switched Rectifier DC Source for Neutral Point Balancing of A NPC Three-Level Inverter for The Full Modulation Range

A switched DC voltage three level NPC is proposed in this paper to eliminate capacitor balancing problems in conventional three-level Neutral Point Clamped (NPC) inverter. The proposed configuration requires only one DC link with a voltage V-dc/2, where V-dc is the DC link voltage in a onventional NPC inverter. To get rated DC link voltage (V-dc), the voltage source is alternately onnected in parallel to one of the two series capacitors using two switches and two diodes with device voltage rating of V-dc/2. The frequency at which the voltage source is switched is independent and will not affect the operation of NPC inverter. The switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two level inverter in lower modulation range, thereby increases the reliability of the drive system. A space vector based PWM scheme is used to verify this proposed topology.

Design of high-order filters with restricted component values

The feasibility of realising a high-order LC filter with a small set of different capacitor values, without sacrificing the frequency response specifications, is indicated. This idea could be conveniently adopted in other filter structures also—for example the FDNR transformed filter realisations.

High-Frequency Current Source Inverter

The frequency range of the current source inverter (CSI) is limited by the slow commutation process in the inverter circuit. A method to reduce the commutation time and to limit the commutation capacitor voltage is proposed. A brief description of the conventional CSI and a detailed analysis of the commutation intervals of the proposed circuit are given. The experimental waveforms observed in the laboratory verify the validity of the analysis.

Area Efficient Loop Filter Design for Charge Pump Phase Locked Loop

In this paper, two new dual-path based area efficient loop filtercircuits are proposed for Charge Pump Phase Locked Loop (CPPLL). The proposed circuits were designed in 0.25 CSM analog process with 1.8V supply. The proposed circuits achievedup to 85% savings in capacitor area. Simulations showed goodmatch of the new circuits with the conventional circuit. Theproposed circuits are particularly useful in applications thatdemand low die area.

Chemical probes into the active centre of a heme thiolate monoxygenase

Linalool-8-monoxygenase, a typical bacterial P-450 heme thiolase, shows a high degree of substrate specificity towards linalool. The active site of the pure enzyme has been probed with a large number of substrate analogues with systematic alterations or conformational variations in the linalool molecule. The comparison of three parameters, the mo→mos conversion of the enzyme as a result of substrate binding monitored at 392 nm, theK D of the analogues giving information about energies of association and the relative turnover as substrate have given information about the space-filling characteristics of the substrates in the enzyme cleft, the number of contacts the molecules make with the respective domains of the enzyme and the distance of the site undergoing hydroxylation from the oxygen site, respectively. The data permit the conclusion that linalool makes contact with the enzyme by hydrogen bonding with the hydroxyl group as well through hydrophobic association with all the eight carbons carrying hydrogen in the molecules.

Generation of High Magnetic Fields Using Thyristors

This paper describes the use of high-power thyristors in conjunction with a low-voltage supply for generating pulsed magnetic fields. A modular bank of electrolytic capacitors is charged through a programmable solid-state power supply and then rapidly discharged through a bank of thyristors into a magnetizing coil. The modular construction of capacitor banks enables the discrete control of pulse energy and time. Peak fields up to 15 telsa (150 KOe) and a half period of about 200 microseconds are generated through the discharges. Still higher fields are produced by discharging into a precooled coil ( 77°K). Measurement method for a pulsed field is described.

Measurement of dielectric constant of conducting liquids

A ratio transformer method suitable for the measurement of the dielectric constant of highly conducting liquids is described. The resistance between the two plates of the capacitor can be as low as 2 k Omega . In this method variations in this low resistance will not give any error in capacitance measurement. One of the features of this method is the simplicity in balancing the resistance, using a LDR (light dependent resistor), without influencing the independent capacitance measurement. The ratio transformer enables the ground capacitances to be eliminated. The change in leakage inductance of the ratio transformer while changing the ratios is also taken into account. The capacitance of a dielectric cell of the order of 50 pF can be measured from 1000 Hz to 100 kHz with a resolution of 0.06 pF. The electrode polarisation problem is also discussed.

Development of Very High Frequency Damped Sine Wave Generator

In order to protect the critical electronic equipment/system against damped sine transient currents induced into its cables due to transient electromagnetic fields, switching phenomena, platform resonances, etc. it is necessary to provide proper hardening. The hardness assurance provided can be evaluated as per the test CS 116 of MIL STD 461E/F in laboratory by generating & inducing the necessary damped sine currents into the cables of the Equipment Under Test (EUT). The need and the stringent requirements for building a damped sine wave current generator for generation of damped sine current transients of very high frequencies (30 MHz & 100 MHz) have been presented. A method using LC discharge for the generation has been considered in the development. This involves building of extremely low & nearly loss less inductors (about 5 nH & 14 nH) as well as a capacitor & a switch with much lower inductances. A technique for achieving this has been described. Two units (I No for 30 MHz. & 100 MHz each) have been built. Experiments to verify the output are being conducted.

Low loss and frequency (1 kHz-1 MHz) independent dielectric characteristics of 3BaO-3TiO(2)-B2O3 glasses

X-ray powder diffraction along with differential thermal analysis carried out on the as-quenched samples in the 3BaO-3TiO(2)-B2O3 system confirmed their amorphous and glassy nature, respectively. The dielectric constants in the 1 kHz-1 MHz frequency range were measured as a function of temperature (323-748 K). The dielectric constant and loss were found to be frequency independent in the 323-473 K temperature range. The temperature coefficient of dielectric constant was estimated using Havinga's formula and found to be 16 ppm K-1. The electrical relaxation was rationalized using the electric modulus formalism. The dielectric constant and loss were 17 +/- 0.5 and 0.005 +/- 0.001, respectively at 323 K in the 1 kHz-1 MHz frequency range which may be of considerable interest to capacitor industry.

Bauer Method of MVDR Spectral Factorization for Pitch Modification in the Source Domain

In our earlier work [1], we employed MVDR (minimum variance distortionless response) based spectral estimation instead of modified-linear prediction method [2] in pitch modification. Here, we use the Bauer method of MVDR spectral factorization, leading to a causal inverse filter rather than a noncausal filter setup with MVDR spectral estimation [1]. Further, this is employed to obtain source (or residual) signal from pitch synchronous speech frames. The residual signal is resampled using DCT/IDCT depending on the target pitch scale factor. Finally, forward filters realized from the above factorization are used to get pitch modified speech. The modified speech is evaluated subjectively by 10 listeners and mean opinion scores (MOS) are tabulated. Further, modified bark spectral distortion measure is also computed for objective evaluation of performance. We find that the proposed algorithm performs better compared to time domain pitch synchronous overlap [3] and modified-LP method [2]. A good MOS score is achieved with the proposed algorithm compared to [1] with a causal inverse and forward filter setup.

'Wet N2O oxidation' process and interface state density characterization of nanoscale nitrided SiO2 for flash memory application

In this paper we first present the 'wet N2O' furnace oxidation process to grow nitrided tunnel oxides in the thickness range 6 to 8 nm on silicon at a temperature of 800 degrees C. Electrical characteristics of MOS capacitors and MOSFETs fabricated using this oxide as gate oxide have been evaluated and the superior features of this oxide are ascertained The frequency response of the interface states, before and after subjecting the MOSFET gate oxide to constant current stress, is studied using a simple analytical model developed in this work.

Structure and bonding of MCB5H7 and its sandwiched dimer CB5H6M–MCB5H6 (M = Si, Ge, Sn): Isomer stability and preference for slip distorted structure

We find sandwiched metal dimers CB5H6M–MCB5H6 (M = Si, Ge, Sn) which are minima in the potential energy surface with a characteristic M–M single bond. The NBO analysis and the M–M distances (Å) (2.3, 2.44 and 2.81 for M = Si, Ge, Sn) indicate substantial M–M bonding. Formal generation of CB5H6M–MCB5H6 has been studied theoretically. Consecutive substitution of two boron atoms in B7H−27 by M (Si, Ge, Sn) and carbon, respectively followed by dehydrogenation may lead to our desired CB5H6M–MCB5H6. We find that the slip distorted geometry is preferred for MCB5H7 and its dehydrogenated dimer CB5H6M–MCB5H6. The slip-distortion of M–M bond in CB5H6M–MCB5H6 is more than the slip distortion of M–H bond in MCB5H7. Molecular orbital analysis has been done to understand the slip distortion. Larger M–M bending (CB5H6M–MCB5H6) in comparison with M–H bending (MCB5H7) is suspected to be encouraged by stabilization of one of the M–M π bonding MO’s. Preference of M to occupy the apex of pentagonal skeleton of MCB5H7 over its icosahedral analogue MCB10H11 has been observed.

Analysis of Energy Quantization Effects on Single-Electron Transistor Circuits

In this paper, the effects of energy quantization on different single-electron transistor (SET) circuits (logic inverter, current-biased circuits, and hybrid MOS-SET circuits) are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantizationmainly increases the Coulomb blockade area and Coulomb blockade oscillation periodicity, and thus, affects the SET circuit performance. A new model for the noise margin of the SET inverter is proposed, which includes the energy quantization effects. Using the noise margin as a metric, the robustness of the SET inverter is studied against the effects of energy quantization. An analytical expression is developed, which explicitly defines the maximum energy quantization (termed as ``quantization threshold'') that an SET inverter can withstand before its noise margin falls below a specified tolerance level. The effects of energy quantization are further studiedfor the current-biased negative differential resistance (NDR) circuitand hybrid SETMOS circuit. A new model for the conductance of NDR characteristics is also formulated that explains the energy quantization effects.

Neutral-point balancing of neutral-point-clamped three-level inverter with a front end switched rectifier DC source for the full modulationn range

A switched rectifier DC voltage source three-level neutral-point-clamped (NPC) converter topology is proposed here to alleviate the inverter from capacitor voltage balancing in three-level drive systems. The proposed configuration requires only one DC link with a voltage of half of that needed in a conventional NPC inverter. To obtain a rated DC link voltage, the rectifier DC source is alternately connected in parallel to one of the two series capacitors using two switches and two diodes with device voltage ratings of half the total DC bus voltage. The frequency at which the voltage source is switched is independent of the inverter and will not affect its operation since the switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two-level inverter in the lower modulation index range, thereby increasing the reliability of the drivesystem. A space-vector-based PWM scheme is used to verify this proposed topology on a laboratory system.

A Proportional plus Multiresonant Controller for Three-Phase Four-Wire High-Frequency Link Inverter

A new solution for unbalanced and nonlinear loads in terms of power circuit topology and controller structure is proposed in this paper. A three-phase four-wire high-frequency ac-link inverter is adopted to cater to such loads. Use of high-frequency transformer results in compact and light-weight systems. The fourth wire is taken out from the midpoint of the isolation transformer in order to avoid the necessity of an extra leg. This makes the converter suitable for unbalanced loads and eliminates the requirements of bulky capacitor in half-bridge inverter. The closed-loop control is carried out in stationary reference frame using proportional + multiresonant controller (three separate resonant controller for fundamental, fifth and seventh harmonic components). The limitations on improving steady-state response of harmonic resonance controllers is investigated and mitigated using a lead-lag compensator. The proposed voltage controller is used along with an inner current loop to ensure excellent performance of the power converter. Simulation studies and experimental results with 1 kVA prototype under nonlinear and unbalanced loading conditions validate the proposed scheme.