HD resolution intra prediction architecture for H.264 decoder

High performance video standards use prediction techniques to achieve high picture quality at low bit rates. The type of prediction decides the bit rates and the image quality. Intra Prediction achieves high video quality with significant reduction in bit rate. This paper presents novel area optimized architecture for Intra prediction of H.264 decoding at HDTV resolution. The architecture has been validated on a Xilinx Virtex-5 FPGA based platform and achieved a frame rate of 64 fps. The architecture is based on multi-level memory hierarchy to reduce latency and ensure optimum resources utilization. It removes redundancy by reusing same functional blocks across different modes. The proposed architecture uses only 13% of the total LUTs available on the Xilinx FPGA XC5VLX50T.

Power scalable digital baseband architecture for IEEE 802.15.4

We propose a power scalable digital base band for a low-IF receiver for IEEE 802.15.4-2006. The digital section's sampling frequency and bit width are used as knobs to reduce the power under favorable signal and interference scenarios, thus recovering the design margins introduced to handle worst case conditions. We propose tuning of these knobs based on measurements of Signal and the interference levels. We show that in a 0.13u CMOS technology, for an adaptive digital base band section of the receiver designed to meet the 802.15.4 standard specification, power saving can be up to nearly 85% (0.49mW against 3.3mW) in favorable interference and signal conditions.

e-SURAKSHAK: A Cyber-Physical Healthcare System with Service Oriented Architecture

In this paper we present the design of ``e-SURAKSHAK,'' a novel cyber-physical health care management system of Wireless Embedded Internet Devices (WEIDs) that sense vital health parameters. The system is capable of sensing body temperature, heart rate, oxygen saturation level and also allows noninvasive blood pressure (NIBP) measurement. End to end internet connectivity is provided by using 6LoWPAN based wireless network that uses the 802.15.4 radio. A service oriented architecture (SOA) 1] is implemented to extract meaningful information and present it in an easy-to-understand form to the end-user instead of raw data made available by sensors. A central electronic database and health care management software are developed. Vital health parameters are measured and stored periodically in the database. Further, support for real-time measurement of health parameters is provided through a web based GUI. The system has been implemented completely and demonstrated with multiple users and multiple WEIDs.

beta gamma-fused turn structures in sugar amino acid (SAA) containing cyclic tetrapeptides with alpha 3 delta architecture

The current manuscript describes conformational analysis of 15-membered cyclic tetrapeptides (CTPs), with alpha 3 delta architecture, containing sugar amino acids (SAA) having variation in the stereocenter at C5 carbon. Conformational analyses of both the series, in protected and deprotected forms, were carried out in DMSO-d(6) using various NMR techniques, supported by restrained MD calculations. It was intriguing to notice that the alpha 3 delta macrocycles got stabilized by both 10-membered beta-turn as well as a seven-membered gamma-turn, fused within the same macrocycle. The presence of fused sub-structures within a 15-membered macrocycle is rare to see. Also, the stereocenter variation at C5 did not affect the fused turn structures and exhibited similar conformations in both the series. The design becomes highly advantageous as fused reverse turn structures are occurring in the cyclic structure with minimalistic size macrocycle and this can be applied to develop suitable pharmacophores in the drug development process. (C) 2014 Elsevier Ltd. All rights reserved.

Adaptive Flight-Control Design Using Neural-Network-Aided Optimal Nonlinear Dynamic Inversion

A neural-network-aided nonlinear dynamic inversion-based hybrid technique of model reference adaptive control flight-control system design is presented in this paper. Here, the gains of the nonlinear dynamic inversion-based flight-control system are dynamically selected in such a manner that the resulting controller mimics a single network, adaptive control, optimal nonlinear controller for state regulation. Traditional model reference adaptive control methods use a linearized reference model, and the presented control design method employs a nonlinear reference model to compute the nonlinear dynamic inversion gains. This innovation of designing the gain elements after synthesizing the single network adaptive controller maintains the advantages that an optimal controller offers, yet it retains a simple closed-form control expression in state feedback form, which can easily be modified for tracking problems without demanding any a priori knowledge of the reference signals. The strength of the technique is demonstrated by considering the longitudinal motion of a nonlinear aircraft system. An extended single network adaptive control/nonlinear dynamic inversion adaptive control design architecture is also presented, which adapts online to three failure conditions, namely, a thrust failure, an elevator failure, and an inaccuracy in the estimation of C-M alpha. Simulation results demonstrate that the presented adaptive flight controller generates a near-optimal response when compared to a traditional nonlinear dynamic inversion controller.

Energy Efficient Memory Decoder Design for Ultra-Low Voltage Systems

This paper presents a low energy memory decoder architecture for ultra-low-voltage systems containing multiple voltage domains. Due to limitations in scalability of memory supply voltages, these systems typically contain a core operating at subthreshold voltages and memories operating at a higher voltage. This difference in voltage provides a timing slack on the memory path as the core supply is scaled. The paper analyzes the feasibility and trade-offs in utilizing this timing slack to operate a greater section of memory decoder circuitry at the lower supply. A 256x16-bit SRAM interface has been designed in UMC 65nm low-leakage process to evaluate the above technique with the core and memory operating at 280 mV and 500 mV respectively. The technique provides a reduction of up to 20% in energy/cycle of the row decoder without any penalty in area and system-delay.

Design and morphology control of a thiophene derivative through electrospraying using various solvents

In the present work, electrospraying of an organic molecule is carried out using various solvents, obtaining fibril structures along with a range of distinct morphologies. Solvent characteristics play a major role in determining the morphology of the organic material. A thiophene derivative (7,9-di(thiophen-2-yl)-8H-cyclopentaa]acenaphthylen-8-one) (DTCPA) of donor-acceptor-donor (DAD) architecture is used to study this solvent effect. Seven solvents with decreasing vapour pressure are selected for experiments. Electrospraying is conducted at a solution concentration of 1.5 wt% and a constant applied voltage of 15 kV. Gradual transformation in morphology of the electrospun product from spiked-spheres to only spikes is observed. A mechanism describing this transformation is proposed based on electron micrograph analysis and XRD analysis. These data indicate that the morphological change is due to the synergistic effect of both vapour pressure and dielectric constant of the solvents. Through a reasonable control of the crystallite size and morphology along with the proposal of the transformation mechanism, this study elucidates electrospraying as a prospective method for designing architectures in organic electronics.