Power scalable digital baseband architecture for IEEE 802.15.4
Data(s) |
2011
|
---|---|
Resumo |
We propose a power scalable digital base band for a low-IF receiver for IEEE 802.15.4-2006. The digital section's sampling frequency and bit width are used as knobs to reduce the power under favorable signal and interference scenarios, thus recovering the design margins introduced to handle worst case conditions. We propose tuning of these knobs based on measurements of Signal and the interference levels. We show that in a 0.13u CMOS technology, for an adaptive digital base band section of the receiver designed to meet the 802.15.4 standard specification, power saving can be up to nearly 85% (0.49mW against 3.3mW) in favorable interference and signal conditions. |
Formato |
application/pdf |
Identificador |
http://eprints.iisc.ernet.in/46211/1/VLSI_Des_30_2011.pdf Dwivedi, Satyam and Amrutur, Bharadwaj S and Bhat, Navakanta (2011) Power scalable digital baseband architecture for IEEE 802.15.4. In: 2011 24th International Conference on VLSI Design (VLSI Design), 2-7 Jan. 2011, Chennai. |
Publicador |
IEEE |
Relação |
http://dx.doi.org/10.1109/VLSID.2011.64 http://eprints.iisc.ernet.in/46211/ |
Palavras-Chave | #Electrical Communication Engineering |
Tipo |
Conference Proceedings PeerReviewed |