Effect of process parameters on transport phenomena during solidification in the presence of electromagnetic stirring

In the present work, a numerical study is performed to predict the effect of process parameters on transport phenomena during solidification of aluminium alloy A356 in the presence of electromagnetic stirring. A set of single-phase governing equations of mass, momentum, energy and species conservation is used to represent the solidification process and the associated fluid flow, heat and mass transfer. In the model, the electromagnetic forces are incorporated using an analytical solution of Maxwell equation in the momentum conservation equations and the slurry rheology during solidification is represented using an experimentally determined variable viscosity function. Finally, the set of governing equations is solved for various process conditions using a pressure based finite volume technique, along with an enthalpy based phase change algorithm. In present work, the effect of stirring intensity and cooling rate are considered. It is found that increasing stirring intensity results in increase of slurry velocity and corresponding increase in the fraction of solid in the slurry. In addition, the increasing stirring intensity results uniform distribution of species and fraction of solid in the slurry. It is also found from the simulation that the distribution of solid fraction and species is dependent on cooling rate conditions. At low cooling rate, the fragmentation of dendrites from the solid/liquid interface is more.

Gasifier stoves - science, technology and field outreach

Development of a new class of single pan high efficiency, low emission stoves, named gasifier stoves, that promise constant power that can be controlled using any solid biomass fuel in the form of pellets is reported here. These stoves use battery-run fan-based air supply for gasification (primary air) and for combustion (secondary air).Design with the correct secondary air flow ensures near-stoichiometric combustion that allows attainment of peak combustion temperatures with accompanying high water boiling efficiencies (up to 50% for vessels of practical relevance) and very low emissions (of carbon monoxide, particulate matter and oxides of nitrogen). The use of high density agro-residue based pellets or coconut shell pieces ensures operational duration of about an hour or more at power levels of 3 kWth (similar to 12 g/min). The principles involved and the optimization aspects of the design are outlined. The dependence of efficiency and emissions on the design parameters are described. The field imperatives that drive the choice of the rechargeable battery source and the fan are brought out. The implications of developments of Oorja-Plus and OorjaSuper stoves to the domestic cooking scenario of India are briefly discussed. The process development, testing and internal qualification tasks were undertaken by Indian Institute of Science. Product development and the fuel pellet production were dealt with by First Energy Private Ltd.Close interaction at several times during this period has helped progress the project from the laboratory to large scale commercial operation. At this time, over four hundred thousand stoves and 30 kilotonnes fuel have been sold in four states in India.

An analytical approach to the study of cooperation in wireless ad hoc networks

In wireless ad hoc networks, nodes communicate with far off destinations using intermediate nodes as relays. Since wireless nodes are energy constrained, it may not be in the best interest of a node to always accept relay requests. On the other hand, if all nodes decide not to expend energy in relaying, then network throughput will drop dramatically. Both these extreme scenarios (complete cooperation and complete noncooperation) are inimical to the interests of a user. In this paper, we address the issue of user cooperation in ad hoc networks. We assume that nodes are rational, i.e., their actions are strictly determined by self interest, and that each node is associated with a minimum lifetime constraint. Given these lifetime constraints and the assumption of rational behavior, we are able to determine the optimal share of service that each node should receive. We define this to be the rational Pareto optimal operating point. We then propose a distributed and scalable acceptance algorithm called Generous TIT-FOR-TAT (GTFT). The acceptance algorithm is used by the nodes to decide whether to accept or reject a relay request. We show that GTFT results in a Nash equilibrium and prove that the system converges to the rational and optimal operating point.

Studies on design, fabrication and reliability assessment of embedded passives on a high-density interconnect (HDI) organic substrate using a sequential build-up process

One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization.This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO3) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm(2). Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (similar to 0.015 at 1 GHz) and proposed low-loss BCB dielectric (similar to 0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo -mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical performance due to thermo-mechanical deformations.Also, a prototype working product with the board level design including features of embedded resistors and capacitors are underway. Preliminary results of these are presented.

An analytical model for the capacity estimation of combined VoIP and TCP file transfers over EDCA in an IEEE 802.11e WLAN

In this paper we develop and numerically explore the modeling heuristic of using saturation attempt probabilities as state dependent attempt probabilities in an IEEE 802.11e infrastructure network carrying packet telephone calls and TCP controlled file downloads, using Enhanced Distributed Channel Access (EDCA). We build upon the fixed point analysis and performance insights in [1]. When there are a certain number of nodes of each class contending for the channel (i.e., have nonempty queues), then their attempt probabilities are taken to be those obtained from saturation analysis for that number of nodes. Then we model the system queue dynamics at the network nodes. With the proposed heuristic, the system evolution at channel slot boundaries becomes a Markov renewal process, and regenerative analysis yields the desired performance measures.The results obtained from this approach match well with ns2 simulations. We find that, with the default IEEE 802.11e EDCA parameters for AC 1 and AC 3, the voice call capacity decreases if even one file download is initiated by some station. Subsequently, reducing the voice calls increases the file download capacity almost linearly (by 1/3 Mbps per voice call for the 11 Mbps PHY).

Optimum atomic spacing for AlAs etching in GaAs epitaxial lift-off technology

With respect to GaAs epitaxial lift-off technology, we report here the optimum atomic spacing (5-10 nm) needed to etch off the AlAs release layer that is sandwiched between two GaAs epitaxial layers. The AlAs etching rate in hydrofluoric acid based solutions was monitored as a function of release layer thickness. We found a sudden quenching in the etching rate, approximately 20 times that of the peak value, at lower dimensions (similar to2.5 nm) of the AlAs epitaxial layer. Since this cannot be explained on the basis of a previous theory (inverse square root of release layer thickness), we propose a diffusion-limited mechanism to explain this reaction process. With the diffusion constant being a mean-free-path-dependent parameter, a relation between the mean free path and the width of the channel is considered. This relation is in reasonable agreement with the experimental results and gives a good physical insight to the reaction kinetics.

Analytical modeling of quantum threshold voltage for triple gate MOSFET

In this work a physically based analytical quantum threshold voltage model for the triple gate long channel metal oxide semiconductor field effect transistor is developed The proposed model is based on the analytical solution of two-dimensional Poisson and two-dimensional Schrodinger equation Proposed model is extended for short channel devices by including semi-empirical correction The impact of effective mass variation with film thicknesses is also discussed using the proposed model All models are fully validated against the professional numerical device simulator for a wide range of device geometries (C) 2010 Elsevier Ltd All rights reserved

Solid State Electrochemical Sensors in Process Control

The basic principles of operation of gas sensors based on solid-state galvanic cells are described. The polarisation of the electrodes can be minimised by the use of point electrodes made of the solid electrolyte, the use of a reference system with chemical potential close to that of the sample system and the use of graded condensed phase reference electrodes. Factors affecting the speed of response of galvanic sensors in equilibrium and non-equilibrium gas mixtures are considered with reference to products of combustion of fossil fuels. An expression for the emf of non-isothermal galvanic sensors and the criterion for the design of temperature compensated reference electrodes for non-isothermal galvanic sensors are briefly outlined. Non-isothermal sensors are useful for the continuous monitoring of concentrations or chemical potentials in reactive systems at high temperatures. Sensors for oxygen, carbon, and alloying elements (Zn and Si) in liquid metals and alloys are discussed. The use of auxiliary electrodes permits the detection of chemical species in the gas phase which are not mobile in the solid electrolyte. Finally, the cause of common errors in galvanic measurements, and tests for correct functioning of galvanic sensors are given. 60 ref.--AA

Design and realization of high-performance wave-pipelined 8×8 b multiplier in CMOS technology

Wave pipelining is a design technique for increasing the throughput of a digital circuit or system without introducing pipelining registers between adjacent combinational logic blocks in the circuit/system. However, this requires balancing of the delays along all the paths from the input to the output which comes the way of its implementation. Static CMOS is inherently susceptible to delay variation with input data, and hence, receives a low priority for wave pipelined digital design. On the other hand, ECL and CML, which are amenable to wave pipelining, lack the compactness and low power attributes of CMOS. In this paper we attempt to exploit wave pipelining in CMOS technology. We use a single generic building block in Normal Process Complementary Pass Transistor Logic (NPCPL), modeled after CPL, to achieve equal delay along all the propagation paths in the logic structure. An 8×8 b multiplier is designed using this logic in a 0.8 ?m technology. The carry-save multiplier architecture is modified suitably to support wave pipelining, viz., the logic depth of all the paths are made identical. The 1 mm×0.6 mm multiplier core supports a throughput of 400 MHz and dissipates a total power of 0.6 W. We develop simple enhancements to the NPCPL building blocks that allow the multiplier to sustain throughputs in excess of 600 MHz. The methodology can be extended to introduce wave pipelining in other circuits as well

Modelling, simulation, and graphical user interface for industrial gas carburising process

A mathematical model has been developed for the gas carburising (diffusion) process using finite volume method. The computer simulation has been carried out for an industrial gas carburising process. The model's predictions are in good agreement with industrial experimental data and with data collected from the literature. A study of various mass transfer and diffusion coefficients has been carried out in order to suggest which correlations should be used for the gas carburising process. The model has been interfaced in a Windows environment using a graphical user interface. In this way, the model is extremely user friendly. The sensitivity analysis of various parameters such as initial carbon concentration in the specimen, carbon potential of the atmosphere, temperature of the process, etc. has been carried out using the model.

Analytical Study of Low-Field Diffusive Transport in Highly Asymmetric Bilayer Graphene Nanoribbon

We present a simplified theory of carrier backscattering coefficient in a twofold degenerate asymmetric bilayer graphene nanoribbon (BGN) under the application of a low static electric field. We show that for a highly asymmetric BGN(Delta = gamma), the density of states in the lower subband increases more that of the upper, in which Delta and gamma are the gap and the interlayer coupling constant, respectively. We also demonstrate that under the acoustic phonon scattering regime, the formation of two distinct sets of energy subbands signatures a quantized transmission coefficient as a function of ribbon width and provides an extremely low carrier reflection coefficient for a better Landauer conductance even at room temperature. The well-known result for the ballistic condition has been obtained as a special case of the present analysis under certain limiting conditions which forms an indirect validation of our theoretical formalism.

A low power, process invariant keeper design for high speed dynamic logic circuits

A low power keeper circuit using the concept of rate sensing has been proposed. The proposed technique reduces the amount of short circuit power dissipation in the domino gate by 70% compared to the conventional keeper technique. Also the total power-delay product is 26% lower compared to the previously reported techniques. The process tracking capability of the design enables the domino gate to achieve uniform delay across different process corners. This reduces the amount of short circuit power dissipation that occurs in the cascaded domino gates by 90%. The use of the proposed technique in the read path of a register file reduces the energy requirement by 26% as compared to the other keeper techniques. The proposed technique has been prototyped in 130nm CMOS technology.