On the measurement of the surface energy budget over a land surface during the summer monsoon

The measurement of surface energy balance over a land surface in an open area in Bangalore is reported. Measurements of all variables needed to calculate the surface energy balance on time scales longer than a week are made. Components of radiative fluxes are measured while sensible and latent heat fluxes are based on the bulk method using measurements made at two levels on a micrometeorological tower of 10 m height. The bulk flux formulation is verified by comparing its fluxes with direct fluxes using sonic anemometer data sampled at 10 Hz. Soil temperature is measured at 4 depths. Data have been continuously collected for over 6 months covering pre-monsoon and monsoon periods during the year 2006. The study first addresses the issue of getting the fluxes accurately. It is shown that water vapour measurements are the most crucial. A bias of 0.25% in relative humidity, which is well above the normal accuracy assumed the manufacturers but achievable in the field using a combination of laboratory calibration and field intercomparisons, results in about 20 W m(-2) change in the latent heat flux on the seasonal time scale. When seen on the seasonal time scale, the net longwave radiation is the largest energy loss term at the experimental site. The seasonal variation in the energy sink term is small compared to that in the energy source term.

Measurement of Partition Coefficients of Substituted Benzoic Acids between Two Immiscible Solvents by Hyper-Rayleigh Scattering

We demonstrate that the hyper-Rayleigh scattering technique can be employed to measure the partition coefficient (k(p)) of a solute in a mixture of two immiscible solvents. Specifically, partition coefficients of six substituted benzoic acids in water/toluene (1:1 v/v) and water/chloroform (1:1 v/v) systems have been measured. Our values compare well with the k(p) values measured earlier by other techniques, The advantages offered by this technique are also discussed.

On-Chip Clock Network Skew Measurement using Sub-Sampling

We present a technique for an all-digital on-chip delay measurement system to measure the skews in a clock distribution network. It uses the principle of sub-sampling. Measurements from a prototype fabricated in a 65 nm industrial process, indicate the ability to measure delays with a resolution of 0.5ps and a DNL of 1.2 ps.

A simple circuit to aid direct measurement of capture cross sections of deep level impurities

An inexpensive and simple circuit to aid the direct measurement of majority carrier capture cross sections of impurity levels in the band gap of a semiconductor by the variable width filling pulse technique is presented. With proper synchronisation, during the period of application of the pulse, the device is disconnected from the capacitance meter to avoid distortion of the pulse and is reconnected again to the meter to record the emission transient. Modes of operation include manual triggering for long emission transients, repetitive triggering for isothermal and DLTS measurements and the DLTS mode which is to be used with signal analysers that already provide a synchronising pulse for disconnection.

Bayesian and Decision Tree Approaches for Pattern Recognition Including Feature Measurement Costs

The minimum cost classifier when general cost functionsare associated with the tasks of feature measurement and classification is formulated as a decision graph which does not reject class labels at intermediate stages. Noting its complexities, a heuristic procedure to simplify this scheme to a binary decision tree is presented. The optimizationof the binary tree in this context is carried out using ynamicprogramming. This technique is applied to the voiced-unvoiced-silence classification in speech processing.

Within-Die Gate Delay Variability Measurement Using Reconfigurable Ring Oscillator

We report the design and characterization of a circuit technique to measure the on-chip delay of an individual logic gate (both inverting and noninverting) in its unmodified form. The test circuit comprises of digitally reconfigurable ring oscillator (RO). The gate under test is embedded in each stage of the ring oscillator. A system of linear equations is then formed with different configuration settings of the RO, relating the individual gate delay to the measured period of the RO, whose solution gives the delay of the individual gates. Experimental results from a test chip in 65-nm process node show the feasibility of measuring the delay of an individual inverter to within 1 ps accuracy. Delay measurements of different nominally identicall inverters in close physical proximity show variations of up to 28% indicating the large impact of local variations. As a demonstration of this technique, we have studied delay variation with poly-pitch, length of diffusion (LOD) and different orientations of layout in silicon. The proposed technique is quite suitable for early process characterization, monitoring mature process in manufacturing and correlating model-to-hardware.