Optical fringe multiplication technique with TEM nano-moiré method

In this paper, a nano-moiré fringe multiplication method is proposed, which can be used to measure nano-deformation of single crystal materials. The lattice structure of Si (111) is recorded on a film at a given magnification under a transmission microscope, which acts as a specimen grating. A parallel grating (binary type) on glass or film is selected as a reference grating. A multiplied nano-moiré fringe pattern can be reproduced in a 4f optical filter system with the specimen grating and the prepared reference grating. The successful results illustrate that this method can be used to measure deformation in nanometre scale. The method is especially useful in the measurement of the inhomogeneous displacement field, and can be utilized to characterize nano-mechanical behaviour of materials such as dislocation and atomic bond failure.

Twinning partial multiplication at grain boundary in nanocrystalline fcc metals

Most deformation twins in nanocrystalline face-centered cubic fcc metals have been observed to form from grain boundaries. The growth of such twins requires the emission of Shockley partials from the grain boundary on successive slip planes. However, it is statistically improbable for a partial to exist on every slip plane. Here we propose a dislocation reaction and cross-slip mechanism on the grain boundary that would supply a partial on every successive slip plane for twin growth.This mechanism can also produce a twin with macrostrain smaller than that caused by a conventional twin.

MODIFIED DIRECT TWOS-COMPLEMENT PARALLEL ARRAY MULTIPLICATION ALGORITHM FOR COMPLEX MATRIX OPERATION

A direct twos-complement parallel array multiplication algorithm is introduced and modified for digital optical numerical computation. The modified version overcomes the problems encountered in the conventional optical twos-complement algorithm. In the array, all the summands are generated in parallel, and the relevant summands having the same weights are added simultaneously without carries, resulting in the product expressed in a mixed twos-complement system. In a two-stage array, complex multiplication is possible with using four real subarrays. Furthermore, with a three-stage array architecture, complex matrix operation is straightforwardly accomplished. In the experiment, parallel two-stage array complex multiplication with liquid-crystal panels is demonstrated.

Stable multiplication gain in GaN p-i-n avalanche photodiodes with large device area

Visible-blind p-i-n avalanche photodiodes (APDs) were fabricated with high-quality GaN epilayers deposited on c-plane sapphire substrates by metal-organic chemical vapour deposition. Due to low dislocation density and a sophisticated device fabrication process, the dark current was as small as similar to 0.05 nA under reverse bias up to 20V for devices with a large diameter of 200 mu m, which was among the largest device area for GaN-based p-i-n APDs yet reported. When the reverse bias exceeded 38V the dark current increased sharply, exhibiting a bulk avalanche field-dominated stable breakdown without microplasma formation or sidewall breakdown. With ultraviolet illumination (360 nm) an avalanche multiplication gain of 57 was achieved.

Performing Fast Addition and Multiplication by Transferring Single Electrons

This paper proposes novel fast addition and multiplication circuits that are based on non-binary redundant number systems and single electron (SE) devices. The circuits consist of MOSFET-based single-electron (SE) turnstiles. We use the number of electrons to represent discrete multiple-valued logic states and we finish arithmetic operations by controlling the number of electrons transferred. We construct a compact PD2,3 adder and a 12x12bit multiplier using the PD2,3 adder. The speed of the adder can be as high as 600MHz with 400nW power dissipation. The speed of the adder is regardless of its operand length. The proposed circuits have much smaller transistors than conventional circuits.

Performance of an embedded optical vector matrix multiplication processor architecture

An embedded architecture of optical vector matrix multiplier (OVMM) is presented. The embedded architecture is aimed at optimising the data flow of vector matrix multiplier (VMM) to promote its performance. Data dependence is discussed when the OVMM is connected to a cluster system. A simulator is built to analyse the performance according to the architecture. According to the simulation, Amdahl's law is used to analyse the hybrid opto-electronic system. It is found that the electronic part and its interaction with optical part form the bottleneck of system.

Strain Gradient Effects on Deformation Strengthening Behavior of Particle Reinforced Metal Matrix Composites

Dislocation models with considering the mismatch of elastic modulus between matrix and reinforcing particles are used to determine the effective strain gradient \ita for particle reinforced metal matrix composites (MMCp) in the present research. Based on Taylor relation and the kinetics of dislocation multiplication, glide and annihilation, a strain gradient dependent constitutive equation is developed. By using this strain gradient-dependent constitutive equation, size-dependent deformation strengthening behavior is characterized. The results demonstrate that the smaller the particle size, the more excellent in the reinforcing effect. Some comparisons with the available experimental results demonstrate that the present approach is satisfactory.

Formation, microstructure and development of the localized shear deformation in low-carbon steels

An investigation has been made into the effect of microstructural parameters on the propensity for forming shear localization produced during high speed torsional testing by split Hopkinson bar with different average rates of 610, 650 and 1500 s(-1) in low carbon steels. These steels received the quenched, quenched and tempered as well as normalized treatments that provide wide microstructural parameters and mechanical properties. The results indicate that the occurrence of the shear localization is susceptible to the strength of the steels. In other words, the tendency of the quenched steel to form a shear band is higher than that of the other two steels. It is also found that there is a critical strain at which the shear localization occurs in the steels. The critical strain value is strongly dependent on the strength of the steels. Before arriving at this point, the material undergoes a slow work-hardening. After this point, the material suffers work-softening, corresponding to a process during which the deformation is gradually localized and eventually becomes spatially correlated to form a macroscopic shear band. Examinations by SEM reveal that the shear localization within the band involves a series of sequential crystallographic and non-crystallographic events including the change in crystal orientation, misorientation, generation and even perhaps damage in microstructures such as the initiation, growth and coalescence of the microcracks. It is expected that the sharp drop in the load-carrying capacity is associated with the growth and coalescence of the microcracks rather than the occurrence of the shear localization, but the shear localization is seen to accelerate the growth and coalescence of the microcracks. The thin foil observations by TEM reveal that the density of dislocations in the band is extremely high and the tangled arrangement and cell structure of dislocations tends to align along the shear direction. The multiplication and interaction of dislocations seems to be responsible for work-hardening of the steels. The avalanche of the dislocation cells corresponds to the sharp drop in shear stress at which the deformed specimen is broken. Double shear bands and kink bands are also observed in the present study. The principal band develops first and its width is narrower than that of the secondary band.

MODIFIED ENGAGEMENT METHOD FOR MATRIX OPERATION

We describe a modified engagement method for matrix operation based on a two-dimensional crossed-ring interconnection network, Our method incorporates fewer steps than that reported by Bocker et al. [Appl. Opt. 22, 804 (1983)], and its performance is found to be the most efficient (minimum steps) in comparison with other systolic and/or engagement methods for matrix operation. Thus, it may be helpful for other optical and electronic implementations of matrix operations. One compact optoelectronic integrity approach for implementing the modified engagement method is briefly described. (C) 1995 Optical Society of America

Compact parallel optical modified-signed-digit arithmetic-logic array processor with electron-trapping device

A compact two-step modified-signed-digit arithmetic-logic array processor is proposed. When the reference digits are programmed, both addition and subtraction can be performed by the same binary logic operations regardless of the sign of the input digits. The optical implementation and experimental demonstration with an electron-trapping device are shown. Each digit is encoded by a single pixel, and no polarization is included. Any combinational logic can be easily performed without optoelectronic and electro-optic conversions of the intermediate results. The system is compact, general purpose, simple to align, and has a high signal-to-noise ratio. (C) 1999 Optical Society of America.

Two-step digit-set-restricted modified signed-digit addition-subtraction algorithm and its optoelectronic implementation

A novel, to our knowledge, two-step digit-set-restricted modified signed-digit (MSD) addition-subtraction algorithm is proposed. With the introduction of the reference digits, the operand words are mapped into an intermediate carry word with all digits restricted to the set {(1) over bar, 0} and an intermediate sum word with all digits restricted to the set {0, 1}, which can be summed to form the final result without carry generation. The operation can be performed in parallel by use of binary logic. An optical system that utilizes an electron-trapping device is suggested for accomplishing the required binary logic operations. By programming of the illumination of data arrays, any complex logic operations of multiple variables can be realized without additional temporal latency of the intermediate results. This technique has a high space-bandwidth product and signal-to-noise ratio. The main structure can be stacked to construct a compact optoelectronic MSD adder-subtracter. (C) 1999 Optical Society of America.

Parallel optical negabinary signed-digit computing: algorithm and optical implementation

Negabinary is a component of the positional number system. A complete set of negabinary arithmetic operations are presented, including the basic addition/subtraction logic, the two-step carry-free addition/subtraction algorithm based on negabinary signed-digit (NSD) representation, parallel multiplication, and the fast conversion from NSD to the normal negabinary in the carry-look-ahead mode. All the arithmetic operations can be performed with binary logic. By programming the binary reference bits, addition and subtraction can be realized in parallel with the same binary logic functions. This offers a technique to perform space-variant arithmetic-logic functions with space-invariant instructions. Multiplication can be performed in the tree structure and it is simpler than the modified signed-digit (MSD) counterpart. The parallelism of the algorithms is very suitable for optical implementation. Correspondingly, a general-purpose optical logic system using an electron trapping device is suggested. Various complex logic functions can be performed by programming the illumination of the data arrays without additional temporal latency of the intermediate results. The system can be compact. These properties make the proposed negabinary arithmetic-logic system a strong candidate for future applications in digital optical computing with the development of smart pixel arrays. (C) 1999 Society of Photo-Optical Instrumentation Engineers. [S0091-3286(99)00803-X].

Efficient two-step digit-set-restricted modified signed-digit algorithm based on optoelectronic shared content-addressable memory

A two-step digit-set-restricted modified signed-digit (MSD) adder based on symbolic substitution is presented. In the proposed addition algorithm, carry propagation is avoided by using reference digits to restrict the intermediate MSD carry and sum digits into {(1) over bar ,0} and {0, 1}, respectively. The algorithm requires only 12 minterms to generate the final results, and no complementarity operations for nonzero outputs are involved, which simplifies the system complexity significantly. An optoelectronic shared content-addressable memory based on an incoherent correlator is used for experimental demonstration. (c) 2005 Society of Photo-Optical Instrumentation Engineers.