45 resultados para Rb fountain frequency standard
em Chinese Academy of Sciences Institutional Repositories Grid Portal
Resumo:
It is the first time in China that the phase variations and phase shift of microwave cavity in a miniature Rb fountain frequency standard are studied, considering the effect of imperfect metallic walls. Wall losses in the microwave cavity lead to small traveling wave components that deliver power from the cavity feed to the walls of cavity. The small traveling wave components produce a microradian distribution of phase throughout the cavity ity, and therefore distributed cavity phase shifts need to be considered. The microwave cavity is a TE011 circular cylinder copper cavity, with round cut-hole of end plates (14mm in diameter) for access for the atomic flux and two small apertures in the center of the side wall for coupling in microwave power. After attenuation alpha is calculated, field variations in cavity are solved. The field variations of the cavity are given. At the same time, the influences of loaded quality factor QL and diameter/height (2a/d) of the microwave cavity on the phase variations and phase shift are considered. According to the phase variation and phase shift of microwave cavity we select the parameters of cavity, diameter 2a = 69.2mm, height d = 34.6mm, QL = 5000, which will result in an uncertainty delta(Delta f / f0 ) < 4.7 x 10(-17) and meets the requirement for the miniature Rb fountain frequency standard with accuracy 10(-15).
Resumo:
A compact direct digital frequency synthesizer (DDFS) for system-on-chip implementation of the high precision rubidium atomic frequency standard is developed. For small chip size and low power consumption, the phase to sine mapping data is compressed using sine symmetry technique, sine-phase difference technique, quad line approximation technique,and quantization and error read only memory (QE-ROM) technique. The ROM size is reduced by 98% using these techniques. A compact DDFS chip with 32bit phase storage depth and a 10bit on-chip digital to analog converter has been successfully implemented using a standard 0.35μm CMOS process. The core area of the DDFS is 1.6mm^2. It consumes 167mW at 3.3V,and its spurious free dynamic range is 61dB.
Resumo:
We have investigated the spectra of the electromagnetically induced transparency (EIT) when a cell is filled with a buffer gas. Our theoretical results show that the buffer gas can induce a narrower spectra line and steeper dispersion than those of the usual EIT case in a homogeneous and Doppler broadened system. The linewidth decreases with the increase of the buffer gas pressure. This narrow spectra may be applied to quantum information processing, nonlinear optics and atomic frequency standard.
Resumo:
对自行研制的激光冷却铷原子喷泉钟的微波谐振腔进行了分析和设计,确定了需要的微波谐振腔基本参数。对影响微波谐振腔共振频率的因素进行了分析和研究,得到了共振频率随环境因素的变化规律。这些对调节微波腔共振频率和提高原子钟的准确度有重要意义。还对研制的微波谐振腔进行了测试,结果表明微波谐振腔的性能满足激光冷却铷原子喷泉钟的要求。由测试结果进一步估算了微波谐振腔引起的横向腔相移。
Resumo:
This paper investigates the absorptive spectral lines of four-level atomic system driven by a coupling, probe and microwave fields. Due to the perturbation of the microwave field, the original electromagnetically induced transparency is changed to electromagnetically induced absorption and the absorptive spectral line can be very narrow. This ultranarrow spectral line has potential applications to the microwave atomic frequency standard and the measurement of very weak magnetic field.
Resumo:
针对多普勒激光雷达激光源短期频率漂移低于1 MHz的要求,设计了一种共焦干涉仪作为频率标准进行稳频。通过对三种不同材料制成的共焦法布里-珀罗(Fabry-Perot)干涉仪中心频率随温度漂移情况进行分析对比,选用零膨胀微晶玻璃材料制作共焦法布里-珀罗干涉仪,腔镜和隔离器通过光胶的方式进行组合,并且置于温控精度优于0.01 K的双层密封温控箱中。经过实验测量,共焦法布里-珀罗干涉仪的自由光谱范围为370 MHz,透射谱半峰全宽(FWHM)为1.7 MHz,精细度为220。采用该共焦干涉仪进行稳频,理论稳频精度可达0.15 MHz,满足激光多普勒雷达单频激光源的稳频要求。
Resumo:
We investigate the effect of the electric field maximum on the Rabi flopping and the generated higher frequency spectra properties by solving Maxwell-Bloch equations without invoking any standard approximations. It is found that the maximum of the electric field will lead to carrier-wave Rabi flopping (CWRF) through reversion dynamics which will be more evident when the applied field enters the sub-one-cycle regime. Therefore, under the interaction of sub-one-cycle pulses, the Rabi flopping follows the transient electric field tightly through the oscillation and reversion dynamics, which is in contrast to the conventional envelope Rabi flopping. Complete or incomplete population inversion can be realized through the control of the carrier-envelope phase (CEP). Furthermore, the generated higher frequency spectra will be changed from distinct to continuous or irregular with the variation of the CEP. Our results demonstrate that due to the evident maximum behavior of the electric field, pulses with different CEP give rise to different CWRFs, and then different degree of interferences lead to different higher frequency spectral features.
Resumo:
We propose a surface planar ion chip which forms a linear radio frequency Paul ion trap. The electrodes reside in the two planes of a chip, and the trap axis is located above the chip surface. Its electric field and potential distribution are similar to the standard linear radio frequency Paul ion trap. This ion trap geometry may be greatly meaningful for quantum information processing.
Resumo:
We study the behaviour of atoms in a field with both static magnetic field and radio frequency (rf) magnetic field. We calculate the adiabatic potential of atoms numerically beyond the usually rotating wave approximation, and it is pointed that there is a great difference between using these two methods. We find the preconditions when RWA is valid. In the extreme of static field almost parallel to rf field, we reach an analytic formula. Finally, we apply this method to Rb-87 and propose a guide based on an rf field on atom chip.
Resumo:
We have experimentally studied the parametric excitation of Rb-87 atoms in a quadrupole-Ioffe-configuration trap. The temperature of an atomic cloud and number of trapped atoms versus time and modulation frequency of the parametric excitation field have been measured. We also noticed that the contribution of atomic collisions to the energy distributions can not be ignored in the case of weak excitation, which results in a lower temperature of the atomic cloud than by Gehm [Phys. Rev. A 58, 3914 (1998)] predicted.
Resumo:
This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.
Resumo:
A monolithic silicon CMOS optoelectronic integrated circuit (OEIC) is designed and fabricated with standard 0.35 mu m CMOS technology. This OEIC circuit consists of light emitting diodes (LED), silicon dioxide waveguide, photodiodes and receiver circuit. The silicon LED operates in reverse breakdown mode and can be turned on at 8.5V 10mA. The silicon dioxide waveguide is composed of multiple layers of silicon dioxide between different metals layers. A two PN-junctions photodetector composed of n-well/p-substrate junction and p(+) active implantation/n-well junction maximizes the depletion region width. The readout circuitry in pixels is exploited to handle as small as 0.1nA photocurrent. Simulation and testing results show that the optical emissions powers are about two orders higher than the low frequency detectivity of silicon CMOS photodetcctor and receiver circuit.
Resumo:
In this paper, a low-power, highly linear, integrated, active-RC filter exhibiting a multi-standard (IEEE 802.11a/b/g and DVB-H) application and bandwidth (3MHz, 4MHz, 9.5MHz) is present. The filter exploits digitally-controlled polysilicon resister banks and an accurate automatic tuning scheme to account for process and temperature variations. The automatic frequency calibration scheme provides better than 3% corner frequency accuracy. The Butterworth filter is design for receiver (WLAN and DVB-H mode) and transmitter (WLAN mode). The filter dissipation is 3.4 mA in RX mode and 2.3 mA (only for one path) in TX mode from 2.85-V supply. The dissipation of calibration consumes 2mA. The circuit has been fabricated in a 0.35um 47-GHz SiGe BiCMOS technology, the receiver and transmitter occupy 0.28-mm(2) and 0.16-mm(2) (calibration circuit excluded), respectively.
Resumo:
This paper presents a wide tuning range CMOS frequency synthesizer for dual-band GPS receiver, which has been fabricated in a standard 0.18-um RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45GHz and 3.14GHz in case of process corner or temperature variation, with a current consumption varying accordingly from 0.8mA to 0.4mA, from a 1.8V supply voltage. The measurement results show that the whole frequency synthesizer costs a very low power consumption of 5.6mW working at L I band with in-band phase noise less than -82dBc/Hz and out-of-band phase noise about -112 dBc/Hz at 1MHz offset from a 3.142GHz carrier.
Resumo:
A compact direct digital frequency synthesizer (DDFS) for system-on-chip (SoC) is developed in this paper. For smaller chip size and lower power consumption, the phase to sine mapping data is compressed by using sine symmetry technique, sine-phase difference technique, quad line approximation (QLA) technique and quantization and error read only memory (QE-ROM) technique. The ROM size is reduced by 98 % using the techniques mentioned above. A compact DDFS chip with 32-bit phase storage depth and a 10-bit on-chip digital to analog converter(DAC) has been successfully implemented using standard 0.35um CMOS process. The core area of the DDFS is 1.6mm(2). It consumes 167 mW at 3.3V, and its spurious free dynamic range (SFDR) is 61dB.