Effect of plant architecture on the structure of epiphytic macro invertebrate communities in a Chinese lake

We examined the effect of different plant architecture types on epiphytic macroinvertebrates of a shallow macrophyte-dominated lake in China. Macroinvertebrates were sampled from four dominant submersed macrophytes in the lake - two dissected plants (Myriophyllum spicatum L. and Ceratophyllum demersum L.) and two undissected plants (Potamogeton maackianus A. Benn. and Vallisneria spiralis L.). Macro invertebrate richness showed significant differences among four submersed macrophyte habitats, and higher density per g of dry plant were associated with dissected plants than undissected plants. The average abundance in dissected plants was as three-six times as in undissected plants. The biodiversity of epiphytic macroinvertebrates was higher in dissected plants than undissected plants. Our results suggest that dissected plants provide different habitat for macroinvertebrates than dissected plant, and this concurs with the hypothesis that the former could support more epiphytic macroinvertebrates than the latter.

Characterization of the sleep architecture in two species of fruit bat

Bats (Chiroptera) are the second-most abundant mammalian order in the world, occupying a diverse range of habitats and exhibiting many different life history traits. In order to contribute to this highly underrepresented group we describe the sleep architecture of two species of frugivorous bat, the greater short-nosed fruit bat (Cynopterus sphinx) and the lesser dawn fruit bat (Eonycteris spelaea). Electroencephalogram (EEG) and electromyogram (EMG) data were recorded from multiple individuals (>= 5) by telemetry over a 72-h period in a laboratory setting with light/dark cycles equivalent to those found in the wild. Our results show that over a 24-h period both species spent more time asleep than awake (mean 15 h), less than previous reported for Chiroptera (20 h). C sphinx spent significantly more of its non-rapid eye movement sleep (NREM) and rapid eye movement sleep (REM) quotas during the light phase, while E. spelaea divided its sleep-wake architecture equally between both light and dark phases. Comparing the sleep patterns of the two species found that C. sphinx had significantly fewer NREM and REM episodes than E. spelaea but each episode lasted for a significantly longer period of time. Potential hypotheses to explain the differences in the sleep architecture of C. sphinx with E. spelaea, including risk of predation and social interaction are discussed. (C) 2010 Published by Elsevier B.V.

A Complex BPF with On Chip Auto-tuning Architecture for Wireless Receivers

A 3(rd) order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18um standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3(rd) order harmonic input intercept point (IIP3) is larger than 16.2dBm, with 50 Omega as the source impedance. The input referred noise is about 80uV(rms). The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28 x 0.22 mm(2), less than 1/8 of that of the main-filter which is 0.92 x 0.59 mm(2). After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.

A Complex BPF with On Chip Auto-tuning Architecture for Low-IF Receivers

A 3(rd) order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18 mu m standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3(rd) order harmonic input intercept point (IIP3) is larger than 19dBm, with 50 Omega as the source impedance. The input referred noise is about 80 mu V-rms. The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28x0.22mm(2), less than 1/8 of that of the main-filter which is 0.92x0.59mm(2). After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.

An adaptive frequency synthesizer architecture reducing reference sidebands

An adaptive phase-locked loop (PLL) frequency synthesizer architecture for reducing reference sidebands at the output of the frequency synthesizer is described. The architecture combines two tuning loops: one is the main loop for locking the PLL frequency synthesizer and operating all the time, the other one is auxiliary loop for reducing reference sidebands and operating only when the main loop is closely locked. A 1.8V 1GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a 0.18um CMOS process. The suppression of the reference sidebands of the proposed frequency synthesizer is 13.8dB more than that of the general frequency synthesizer.

A Novel Architecture of Vision Chip for Fast Traffic Lane Detection and FPGA Implementation

This paper presents a novel architecture of vision chip for fast traffic lane detection (FTLD). The architecture consists of a 32*32 SIMD processing element (PE) array processor and a dual-core RISC processor. The PE array processor performs low-level pixel-parallel image processing at high speed and outputs image features for high-level image processing without I/O bottleneck. The dual-core processor carries out high-level image processing. A parallel fast lane detection algorithm for this architecture is developed. The FPGA system with a CMOS image sensor is used to implement the architecture. Experiment results show that the system can perform the fast traffic lane detection at 50fps rate. It is much faster than previous works and has good robustness that can operate in various intensity of light. The novel architecture of vision chip is able to meet the demand of real-time lane departure warning system.

VLSI architecture of a K-best detector for MIMO--OFDM wireless communication systems

The K-best detector is considered as a promising technique in the MIMO-OFDM detection because of its good performance and low complexity. In this paper, a new K-best VLSI architecture is presented. In the proposed architecture, the metric computation units (MCUs) expand each surviving path only to its partial branches, based on the novel expansion scheme, which can predetermine the branches' ascending order by their local distances. Then a distributed sorter sorts out the new K surviving paths from the expanded branches in pipelines. Compared to the conventional K-best scheme, the proposed architecture can approximately reduce fundamental operations by 50% and 75% for the 16-QAM and the 64-QAM cases, respectively, and, consequently, lower the demand on the hardware resource significantly. Simulation results prove that the proposed architecture can achieve a performance very similar to conventional K-best detectors. Hence, it is an efficient solution to the K-best detector's VLSI implementation for high-throughput MIMO-OFDM systems.

Architecture research and hardware implementation on simplified neural computing system for face identification

This paper describes a special-purpose neural computing system for face identification. The system architecture and hardware implementation are introduced in detail. An algorithm based on biomimetic pattern recognition has been embedded. For the total 1200 tests for face identification, the false rejection rate is 3.7% and the false acceptance rate is 0.7%.

A new half-flash architecture for high speed video ADC

In this paper a new half-flash architecture for high speed video ADC is presented. Based on a high speed single-way analog switch circuit, this architecture effectively reduces the number of elements. At the same lime no sacrifice of speed is needed compared with the normal half-flash structure.

The design of cascaded resistors in a new analog switch two-step ADC architecture

In this paper we introduce a new Half-flash analog switch ADC architecture. And we discuss two methods to design the values of the cascaded resistors which generate the reference voltages. Derailed analysis about the effect of analog switches and comparators on reference voltages, and the methods to set the resistor values and correspond;ng voltage errors are given.

Ancient Chinese algorithm: The Ying Buzu Shu (method of surplus and deficiency) vs Newton iteration method

Air exploratory discussion of an ancient Chinese algorithm, the Ying Buzu Shu, in about 2nd century BC, known as the rule of double false position in the West is given. In addition to pointing out that the rule of double false position is actually a translation version of the ancient Chinese algorithm, a comparison with well-known Newton iteration method is also made. If derivative is introduced, the ancient Chinese algorithm reduces to the Newton method. A modification of the ancient Chinese algorithm is also proposed, and some of applications to nonlinear oscillators are illustrated.

中国力学学会史 = A history of Chinese society of theoretical and applied mechanics

《中国力学学会史》是《中国学会史丛书》之一。是一部全面系统记述中国力学学会建立与发展历程的专著。 《中国力学学会史》全书30万字，书中不但重点对学会的初创情况、发展过程、组织建设、学术交流、分支机构等进行了专门介绍，还特别收录了记述学会重大活动情况的大事记、名人与学会发展的丰富资料和一些极有史料价值的历史照片，旨在反映学会在不同时期的活动概况及其在中国力学界中发挥的桥梁与纽带作用。 中国力学学会是中国科协的组成部分，也是我国著名的学术团体之一，仅以此书的编著出版，纪念中国科协成立50周年和中国力学学会成立50多周年。本书可供力学界和科技界有关部门及工作者、各学会相关人员、大专院校师生参阅，也可作为组织和开展国内外学术交流研究的参考资料。

High-Strength Composite Fibers: Realizing True Potential of Carbon Nanotubes in Polymer Matrix through Continuous Reticulate Architecture and Molecular Level Couplings

Carbon nanotubes have unprecedented mechanical properties as defect-free nanoscale building blocks, but their potential has not been fully realized in composite materials due to weakness at the interfaces. Here we demonstrate that through load-transfer-favored three-dimensional architecture and molecular level couplings with polymer chains, true potential of CNTs can be realized in composites as Initially envisioned. Composite fibers with reticulate nanotube architectures show order of magnitude improvement in strength compared to randomly dispersed short CNT reinforced composites reported before. The molecular level couplings between nanotubes and polymer chains results in drastic differences in the properties of thermoset and thermoplastic composite fibers, which indicate that conventional macroscopic composite theory falls to explain the overall hybrid behavior at nanoscale.

Compression of Chinese document images based on morphologic analysis and pattern matching

We propose a highly efficient content-lossless compression scheme for Chinese document images. The scheme combines morphologic analysis with pattern matching to cluster patterns. In order to achieve the error maps with minimal error numbers, the morphologic analysis is applied to decomposing and recomposing the Chinese character patterns. In the pattern matching, the criteria are adapted to the characteristics of Chinese characters. Since small-size components sometimes can be inserted into the blank spaces of large-size components, we can achieve small-size pattern library images. Arithmetic coding is applied to the final compression. Our method achieves much better compression performance than most alternative methods, and assures content-lossless reconstruction. (c) 2006 Society of Photo-Optical Instrumentation Engineers.