The design of cascaded resistors in a new analog switch two-step ADC architecture


Autoria(s): Li SZ; Shi Y; Zhu RH; Wang SJ
Data(s)

1998

Resumo

In this paper we introduce a new Half-flash analog switch ADC architecture. And we discuss two methods to design the values of the cascaded resistors which generate the reference voltages. Derailed analysis about the effect of analog switches and comparators on reference voltages, and the methods to set the resistor values and correspond;ng voltage errors are given.

In this paper we introduce a new Half-flash analog switch ADC architecture. And we discuss two methods to design the values of the cascaded resistors which generate the reference voltages. Derailed analysis about the effect of analog switches and comparators on reference voltages, and the methods to set the resistor values and correspond;ng voltage errors are given.

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Chinese Inst Electr.; IEEE Electron Devices Soc.; IEEE Solid State Circuits Soc.; Japan Soc Appl Phys.; URSI Commiss D.; IEE, Electr Div, UK.; Korea Inst Telemat & Electr.; IEEE Beijing Sect.; Mat Res Soc.; Natl Nat Sci Fdn China.

Chinese Acad Sci, Inst Semicond, Beijing 100083, Peoples R China

Chinese Inst Electr.; IEEE Electron Devices Soc.; IEEE Solid State Circuits Soc.; Japan Soc Appl Phys.; URSI Commiss D.; IEE, Electr Div, UK.; Korea Inst Telemat & Electr.; IEEE Beijing Sect.; Mat Res Soc.; Natl Nat Sci Fdn China.

Identificador

http://ir.semi.ac.cn/handle/172111/13825

http://www.irgrid.ac.cn/handle/1471x/105094

Idioma(s)

英语

Publicador

IEEE

345 E 47TH ST, NEW YORK, NY 10017 USA

Fonte

Li SZ; Shi Y; Zhu RH; Wang SJ .The design of cascaded resistors in a new analog switch two-step ADC architecture .见:IEEE .1998 5TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY PROCEEDINGS,345 E 47TH ST, NEW YORK, NY 10017 USA ,1998,397-400

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Tipo

会议论文