70 resultados para Power supply circuits
Resumo:
A low-cost low-power single chip WLAN 802.11a transceiver is designed for personal communication terminal and local multimedia data transmission. It has less than 130mA current dissipation, maximal 67dB gain and can be programmed to be 20dB minimal gain. The receiver system noise figure is 6.4dB in hige-gain mode.
Resumo:
In this paper, a wide-band low noise amplifier, two mixers and a VCO with its buffers implemented in 50GHz 0.35 mu m SiGe BiCMOS technology for dual-conversion digital TV tuner front-end is presented. The LNA and up-converting mixer utilizes current injection technology to achieve high linearity. Without using inductors, the LNA achieves 0.1-1GHz wide bandwidth and 18.8-dB gain with less than 1.4-dB gain variation. The noise figure of the LNA is less than 5dB and its 1dB compression point is -2 dBm. The IIP3 of two mixers is 25-dBm. The measurement results show that the VCO has -127.27-dBc/Hz phase noise at 1-MHz offset and a linear gain of 32.4-MHz/V between 990-MHz and 1.14-GHz. The whole chip consume 253mW power with 5-V supply.
Resumo:
The wideband high-linearity mixers for a double conversion cable TV tuner is presented. The up-conversion mixer converts the input signal from 100MHz to 1000 MHz to the intermediate frequency (IF) of I GHz above. And the down-conversion mixer converts the frequency back. The degeneration resistors are used to Improve the linearity. The tuner is implemented in a 0.35 mu m SiGe technology. Input power at 1dB compression point can reach +14.23dBm. The lowest noise figure is 17.5dB. The two mixers consume 103mW under a supply voltage of 5 V.
Resumo:
This paper presents the design of a wide-band low-noise amplifier (LNA) implemented in a 0.35 mu m SiGe BiCMOS technology for cable (DVB-C) and terrestrial (DVB-T) tuner applications. The LNA utilizes current injection to achieve high linearity. Without using inductors, the LNA achieves 0.1-1GHz wide bandwidth and 18.8-dB gain with less than 1.4-dB gain variation. The noise figure(NF) of the wideband LNA is 5dB, its 1-dB compression point is -2dBm and IIP3 is 8dBm. The LNA dissipates 120mW power with a 5-V supply.
Resumo:
A SOI thenno-optic variable optical attenuator with U-grooves based on a multimode interference coupler principle is fabricated. The dynamic attenuation range is 0 to 29 dB; at the wavelength range between 1510 nm and 1610nm, and the maximum power consumption is only l30mW. Compared to the variable optical attenuator without U-groove, the maximum power consumption decreases more than 230mW
Resumo:
This paper presents a novel fully integrated MOS AC to DC charge pump with low power dissipation and stable output for RFID applications. To improve the input sensitivity, we replaced Schottky-diodes in conventional charge pumps with MOS diodes with zero threshold, which has less process defects and is thus more compatible with other circuits. The charge pump in a RFID transponder is implemented in a 0.35um CMOS technology with 0.24 sq mm die size. The analytical model of the charge pump and the simulation results are presented.
Resumo:
An analog baseband circuit made in a 0.35-μm SiGe BiCMOS process is presented for China Multimedia Mobile Broadcasting (CMMB) direct conversion receivers. A high linearity 8th-order Chebyshev low pass filter (LPF) with accurate calibration system is used. Measurement results show that the filter provides 0.5-dB pass-band ripple, 4% bandwidth accuracy, and -35-dB attenuation at 6 MHz with a cutoff frequency of 4 MHz. The current steering type variable gain amplifier (VGA) achieves more than 40-dB gain range with excellent temperature compensation.This tuner baseband achieves an OIP3 of 25.5 dBm, dissipates 16.4 mA under a 2.8-V supply and occupies 1.1 mm~2 of die size.
Resumo:
This paper presents a wide tuning range CMOS frequency synthesizer for a dual-band GPS receiver,which has been fabricated in a standard 0.18μm RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45 and 3.14GHz in case of process corner or temperature variation,with a current consumption varying accordingly from 0.8 to 0.4mA,from a 1.8V supply voltage. Measurement results show that the whole frequency synthesizer consumes very low power of 5.6mW working at L1 band with in-band phase noise less than - 82dBc/Hz and out-of-band phase noise about - ll2dBc/Hz at 1MHz offset from a 3. 142GHz carrier. The performance of the frequency synthesizer meets the requirements of GPS applications very well.
Resumo:
With the principles of microwave circuits and semiconductor device physics, two microwave power device test circuits combined with a test fixture are designed and simulated, whose properties are evaluated by a parameter network analyzer within the frequency range from 3 to 8GHz. The simulation and experimental results verify that the test circuit with a radial stub is better than that without. As an example, a C-band AlGaN/GaN HEMT microwave power device is tested with the designed circuit and fixture. With a 5.4GHz microwave input signal, the maximum gain is 8.75dB, and the maximum output power is 33.2dBm.
Resumo:
Low power design method is used in a 100MHz embedded SRAM. The embedded SRAM used in a FFT chip is divided into 16 blocks. Two-level decoders are used and only one block can be selected at one time by tristate control circuits, while other blocks are set stand-by. The SRAM cell has been optimized and the cell area has been minimized at the same time.