Design and analysis of 1.3 mu m GaAs-based quantum dot vertical-cavity surface-emitting lasers

A theoretical study on 1.3 mu m GaAs-based quantum dot vertical-cavity surface-emitting lasers (VCSELs) was made. Investigation of the influence of VCSELs on the optical confinement factors and the optical loss and the calculation of the material gain of the assembled InGaAs/GaAs quantum dots. Analysis of the threshold characteristic was made and the multi-wavelength cavity and multilayer quantum-dot stack structure is found to be more suitable for quantum dot VCSELs.

Optimized design on high-power GaN-based Micro-LEDs - art. no. 684108

The structure of micro-LEDs was optimized designed. Optical, electrical and thermal characteristics of micro-LEDs were improved. The optimized design make micro-LEDs suitable for high-power device. The light extraction efficiency of micro-LEDs was analyzed by the means of ray tracing. The results shows that increasing the inclination angle of sidewall and height of mesa, and reducing the absorption of p and n electrode can enhance the light extraction efficiency of micro-LEDs. Furthermore, the total light output power can be boosted by increasing the density of micro-structures on the device. The high-power flip-chip micro-LEDs were fabricated, which has higher quantum efficiency than conventional BALED's. When the number of microstructure in micro-LEDs was increased by 57%, the light output power was enhanced 24%. Light output power is 82.88mW at the current of 350mA and saturation current is up to 800mA, all of these are better than BALED which was fabricated in the same epitaxial wafer. The IN characteristics of micro-LEDs are almost identical to BALED.

Design considerations for a silicon-based p-i-n phase modulator in a double ridge waveguide with side isolating grooves

We present detail design considerations and simulation results of a forward biased carrier injection p-i-n modulator integrated on SOI rib waveguides. To minimize the free carrier absorption loss while keeping the comparatively small lateral dimensions of the modulator as required for high speed operation, we proposed two structural improvements, namely the double ridge (terrace ridge) structure and the isolating grooves at both sides of the double ridge. With improved carrier injection and optical confinement structure, the simulated modulator response time is in sub-ns range and absorption loss is minimized.

Circuit design and simulation of a CMOS-based preamplifier for brain neural signals

A novel CMOS-based preamplifier for amplifying brain neural signal obtained by scalp electrodes in brain-computer interface (BCI) is presented in this paper. By means of constructing effective equivalent input circuit structure of the preamplifier, two capacitors of 5 pF are included to realize the DC suppression compared to conventional preamplifiers. Then this preamplifier is designed and simulated using the standard 0.6 mu m MOS process technology model parameters with a supply voltage of 5 volts. With differential input structures adopted, simulation results of the preamplifier show that the input impedance amounts to more than 2 Gohm with brain neural signal frequency of 0.5 Hz-100 Hz. The equivalent input noise voltage is 18 nV/Hz(1/2). The common mode rejection ratio (CMRR) of 112 dB and the open-loop differential gain of 90 dB are achieved.

Design of Tapered Rib Spot-Size Converter with Double-Cladding Structure

A novel structure of spot-size converter is designed to allow low loss and large alignment tolerance between single-mode rib waveguide devices and fiber arrays theoretically. The spot-size converter consists of a tapered rib core region and a double-cladding region. Through optimizing parameters,an expanded mode field can be tightly confined in the inner cladding and thus radiation loss be reduced largely at the tapered region. The influence of refractive index and thickness of the inner cladding on coupling loss is analyzed in particular. A novel,easy method of fabricating tapered rib spot-size converter based on silicon-on-insulator material is proposed.