Cross-species chromosome painting unveils cytogenetic signatures for the Eulipotyphla and evidence for the polyphyly of Insectivora

Insectivore-like animals are traditionally believed among the first eutherian mammals that have appeared on the earth. The modern insectivores are thus crucial for understanding the systematics and phylogeny of eutherian mammals as a whole. Here cross-spe

Variation in stable isotope signatures of seston and a zooplanktivorous fish in a eutrophic Chinese lake

Temporal and spatial changes in delta(13)C and delta(15)N of seston (mainly phytoplankton) and isotopic relationship between seston and the lake anchovy (Coilia ectenes) were studied in the large eutrophic freshwater Lake Chaohu in China. Much of the spatial and temporal variation in delta(13)C of lake anchovies was explained by variation in seston, indicating a strong link between pelagic primary production and higher order consumers. Because the lake is shallow, there were no significant differences in delta(13)C and delta(15)N of seston between surface and overlying waters. Spatially, the relatively high delta(13)C and delta(15)N of seston in the western part of the lake might be due to high levels of anthropogenically derived N and C introduced from the surrounding cities through sewage drainage systems. The trophic position of the lake anchovy in the food web of Lake Chaohu was estimated to be 2.9-4.1 (3.5 +/- 0.4), which agrees well with the previous stomach content analysis suggesting that the lake anchovy fed both on zooplankton and small planktivorous fishes.

Crosstalk analysis of a fiber laser sensor array system based on digital phase-generated carrier scheme

A detailed study on analyzing the crosstalk in a wavelength division multiplexed fiber laser sensor array system based on a digital phase generated carrier interferometric interrogation scheme is reported. The crosstalk effects induced by the limited optical channel isolation of a dense wavelength division demultiplexer (DWDM) are presented, and the necessary channel isolation to keep the crosstalk negligible to the output signal was calculated via Bessel function expansion and demonstrated by a two serial fiber laser sensors system. Finally, a three-element fiber laser sensor array system with a 50-dB channel-isolation DWDM was built up. Experimental results demonstrated that there was no measurable crosstalk between the output channels.

Analog-digital and digital-analog converters using single-electron and MOS transistors

This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and metal-oxide-semiconductor (MOS) transistors. The SET/MOS hybrid ADC and DAC circuits possess the merits of the SET circuit and the MOS circuit. We obtain the SPICE macro-modeling code of the SET transistor by studying and fitting the characteristics of the SET with SPICE simulation and Monte Carlo simulation methods. The SPICE macro-modeling code is used for the simulation of the SET/MOS hybrid ADC and DAC circuits. We simulate the performances of the SET/MOS hybrid 3-b ADC and 2-b DAC circuits by using the H-SPICE simulator. The simulation results demonstrate that the hybrid circuits can perform analog-digital and digital-analog data conversion well at room temperature. The hybrid ADC and DAC circuits have advantages as-follows: 1) compared with conventional circuits, the architectures of the circuits are simpler; 2) compared with single electron transistor circuits, the circuits have much larger load capability; 3) the power dissipation of the circuits are lower than uW; 4) the data conversion rate of the circuits can exceed 100 MHz; and 5) the resolution of the ADC and DAC circuits can be increased by the pipeline architectures.

A direct digital frequency synthesizer with fourth-order phase domain Delta Sigma noise shaper and 12-bit current-steering DAC

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

A Compact Direct Digital Frequency Synthesizer for System-on-chip

A compact direct digital frequency synthesizer (DDFS) for system-on-chip (SoC) is developed in this paper. For smaller chip size and lower power consumption, the phase to sine mapping data is compressed by using sine symmetry technique, sine-phase difference technique, quad line approximation (QLA) technique and quantization and error read only memory (QE-ROM) technique. The ROM size is reduced by 98 % using the techniques mentioned above. A compact DDFS chip with 32-bit phase storage depth and a 10-bit on-chip digital to analog converter(DAC) has been successfully implemented using standard 0.35um CMOS process. The core area of the DDFS is 1.6mm(2). It consumes 167 mW at 3.3V, and its spurious free dynamic range (SFDR) is 61dB.

A Novel Low-Power Digital Baseband Circuit for UHF RFID Tag with Sensors

A novel low-power digital baseband circuit for UHF RFID tag with sensors is presented in this paper. It proposes a novel baseband architecture and a new operating scheme to fulfill the sensor functions and to reduce power consumption. It is also compatible with the EPC C1G2 UHF RFID protocol. It adopts some advanced low power techniques for system design and circuit design: adaptive clock-gating, multi-clock domain and asynchronous circuit. The baseband circuit is implemented in 0.18um 1P3M standard CMOS process. ne chip area is 0.28 mm(2) excluding test pads. Its power consumption is 25uW under 1.1V power supply.

A direct digital frequency synthesizer with single-stage delta-sigma interpolator and current-steering DAC

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a 4th-order single-stage pipelined delta-sigma interpolator and a 300MS/s 12-bit current-steering DAC based on Q(2) Random Walk switching scheme. The delta-sigma interpolator is used to reduce the phase truncation error and the ROM size. The measured spurious-free dynamic range (SFDR) is greater than 80 dB for 8-bit phase value and 12-bit sine-amplitude output. The DDFS prototype is fabricated in a 0.35um CMOS technology with core area of 1.11mm(2).

A direct digital frequency synthesizer with fourth-order phase domain Delta Sigma noise shaper and 12-bit current-steering DAC

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

Fatty-acids and their C-13 signatures in seep carbonates from hydrocarbon seeps on the upper (GC 185) and lower (AC 645) continental slope of the Gulf of Mexico

Here we reported the fatty-acids and their δ 13C values in seep carbonates collected from Green Canyon lease block 185 (GC 185; Sample GC-F) at upper continental slope (water depth: ∼540 m), and Alaminos Canyon lease block 645 (GC 645; Sample AC-E) at lower continental slope (water depth: ∼2200 m) of the Gulf of Mexico. More than thirty kinds of fatty acids were detected in both samples. These fatty acids are maximized at C16. There is a clear even-over-odd carbon number predominance in carbon number range. The fatty acids are mainly composed of n-fatty acids, iso-/anteiso-fatty acids and terminally branched odd-numbered fatty acids (iso/anteiso). The low δ 13C values (−39.99‰ to.32.36‰) of n-C12:0, n-C13:0, i-C14:0and n-C14:0 suggest that they may relate to the chemosynthetic communities at seep sites. The unsaturated fatty acids n-C18:2 and C18:1Δ9 have the same δ 13C values, they may originate from theBeggiatoa/Thioploca. Unlike other fatty acids, the terminally branched fatty acids (iso/anteiso) show lowerδ 13C values (as low as −63.95‰) suggesting a possible relationship to sulfate reducing bacteria, which is common during anaerobic oxidation of methane at seep sites.

A high speed direct digital frequency synthesizer realized by a segmented nonlinear DAC

This paper presents a high speed ROM-less direct digital frequency synthesizer (DDFS) which has a phase resolution of 32 bits and a magnitude resolution of 10 bits. A 10-bit nonlinear segmented DAC is used in place of the ROM look-up table for phase-to-sine amplitude conversion and the linear DAC in a conventional DDFS.The design procedure for implementing the nonlinear DAC is presented. To ensure high speed, current mode logic (CML) is used. The chip is implemented in Chartered 0.35μm COMS technology with active area of 2.0 × 2.5 mm~2 and total power consumption of 400 mW at a single 3.3 V supply voltage. The maximum operating frequency is 850 MHz at room temperature and 1.0 GHz at 0 ℃.

A Compact Direct Digital Frequency Synthesizer for the Rubidium Atomic Frequency Standard

A compact direct digital frequency synthesizer （DDFS） for system-on-chip implementation of the high precision rubidium atomic frequency standard is developed. For small chip size and low power consumption, the phase to sine mapping data is compressed using sine symmetry technique, sine-phase difference technique, quad line approximation technique,and quantization and error read only memory （QE-ROM） technique. The ROM size is reduced by 98% using these techniques. A compact DDFS chip with 32bit phase storage depth and a 10bit on-chip digital to analog converter has been successfully implemented using a standard 0.35μm CMOS process. The core area of the DDFS is 1.6mm^2. It consumes 167mW at 3.3V,and its spurious free dynamic range is 61dB.

A New Method to Investigate InGaAsP Single-Photon Avalanche Diodes Using a Digital Sampling Oscilloscope

A near-infrared single-photon detection system is established by using pigtailed InGaAs/InP avalanche photodiodes. With a 50GHz digital sampling oscilloscope, the function and process of gated-mode (Geiger-mode) single-photon detection are intuitionally demonstrated for the first time. The performance of the detector as a gated-mode single-photon counter at wavelengths of 1310 and 1550nm is investigated. At the operation temperature of 203K,a quantum efficiency of 52% with a dark count probability per gate of 2. 4 * 10~(-3), and a gate pulse repetition rate of 50kHz are obtained at 1550nm. The corresponding parameters are 43% , 8. 5 * 10~(-3), and 200kHz at 238K.