Subband electron properties of InGaAs/InAlAs high-electron-mobility transistors with different channel chickness

Magnetotransport properties of In-0.53 GaAs/In-0.52 AlAs high electron mobility transistor (HEMT) structures with different channel thickness of 10-35 nm have been investigated in magnetic fields up to 13 T at 1.4 K. Fast Fourier transform has been employed to obtain the subband density and mobility of the two-dimensional electron gas in these HEMT structures. We found that the thickness of channel does not significantly enhance the electron density of the two-dimensional electron gas, however, it has strong effect on the proportion of electrons inhabited in different subbands. When the size of channel is 20 nm, the number of electrons occupying the excited subband, which have higher mobility, reaches the maximum. The experimental values obtained in this work are useful for the design and optimization of InGaAs/InAlAs HEMT devices.

Observations on subband electron properties in In0.65Ga0.35As/In0.52Al0.48As MM-HEMT with Si delta-doped on the barriers

Magneto-transport measurements have been carried out on a Si delta-doped In0.65Ga0.35As/In0.52Al0.48As metamorphic high-electron-mobility transistor with InP substrate in a temperature range between 1.5 and 60 K under magnetic field up to 13 T. We studied the Shubnikov-de Haas (SdH) effect and the Hall effect for the In0.65Ga0.35As/In0.52Al0.48As single quantum well occupied by two subbands and obtained the electron concentration and energy levels respectively. We solve the Schrodinger-Kohn-Sham equation in conjunction with the Poisson equation self-consistently and obtain the configuration of conduction band, the distribution of carriers concentration, the energy level of every subband and the Fermi energy. The calculational results are well consistent with the results of experiments. Both experimental and calculational results indicate that almost all of the delta-doped electrons transfer into the quantum well in the temperature range between 1.5 and 60 K.

1-mm gate periphery AlGaN/AIN/GaN HEMTs on SiC with output power of 9.39 W at 8 GHz

AlGaN/AlN/GaN high electron mobility transistor (HEMT) structures with high mobility GaN channel layer were grown on 50 min diameter semi-insulating (SI) 6H-SiC substrates by metalorganic chemical vapor deposition and large periphery HEMT devices were fabricated and characterized. High two-dimensional electron gas mobility of 2215 cm(2)/V s at room temperature with sheet electron concentration of 1.044 x 10(13)/cm(2) was achieved. The 50 mm diameter HEMT wafer exhibited a low average sheet resistance of 251.0 Omega/square, with the resistance uniformity of 2.02%. Atomic force microscopy measurements revealed a smooth AlGaN surface with a root-mean-square roughness of 0.27 nm for a scan area of 5 mu mi x 5 pm. The 1-mm gate width devices fabricated using the materials demonstrated a very high continuous wave output power of 9.39 W at 8 GHz, with a power added efficiency of 46.2% and power gain of 7.54 dB. A maximum drain current density of 1300 mA/mm, an extrinsic transconductance of 382 mS/mm, a current gain cutoff frequency of 31 GHz and a maximum frequency of oscillation 60 GHz were also achieved in the same devices. (C) 2007 Elsevier Ltd. All rights reserved.

Growth and characterization of AlGaN/AlN/GaN HEMT structures with a compositionally step-graded AlGaN barrier layer

A new AlGaN/AlN/GaN high electron mobility transistor (HEMT) structure using a compositionally step-graded AlGaN barrier layer is grown on sapphire by metalorganic chemical vapour deposition (MOCVD). The structure demonstrates significant enhancement of two-dimensional electron gas (2DEG) mobility and smooth surface morphology compared with the conventional HEMT structure with high Al composition AlGaN barrier. The high 2DEG mobility of 1806 cm(2)/Vs at room temperature and low rms surface roughness of 0.220 nm for a scan area of 5 mu m x 5 mu m are attributed to the improvement of interfacial and crystal quality by employing the step-graded barrier to accommodate the large lattice mismatch stress. The 2DEG sheet density is independent of the measurement temperature, showing the excellent 2DEG confinement of the step-graded structure. A low average sheet resistance of 314.5 Omega/square, with a good resistance uniformity of 0.68%, is also obtained across the 50 mm epilayer wafer. HEMT devices are successfully fabricated using this material structure, which exhibits a maximum extrinsic transconductance of 218 mS/mm and a maximum drain current density of 800 mA/mm.

Novel hybrid voltage controlled ring oscillators using single electron and MOS transistors

This paper proposes two kinds of novel hybrid voltage controlled ring oscillators (VCO) using a single electron transistor (SET) and metal-oxide-semiconductor (MOS) transistor. The novel SET/MOS hybrid VCO circuits possess the merits of both the SET circuit and the MOS circuit. The novel VCO circuits have several advantages: wide frequency tuning range, low power dissipation, and large load capability. We use the SPICE compact macro model to describe the SET and simulate the performances of the SET/MOS hybrid VCO circuits by HSPICE simulator. Simulation results demonstrate that the hybrid circuits can operate well as a VCO at room temperature. The oscillation frequency of the VCO circuits could be as high as 1 GHz, with a -71 dBc/Hz phase noise at 1 MHz offset frequency. The power dissipations are lower than 2 uW. We studied the effect of fabrication tolerance, background charge, and operating temperature on the performances of the circuits.

AlGaN/AlN/GaN/SiC HEMT structure with high mobility GaN thin layer as channel grown by MOCVD

Enhancement of the electrical properties in an AlGaN/GaN high electron mobility transistor (HEMT) structures was demonstrated by employing the combination of a high mobility GaN channel layer and an AlN interlayer. The structures were grown on 50 mm semi-insulating (SI) 6H-SiC substrates by metalorganic chemical vapor deposition (MOCVD). The room temperature (RT) two-dimensional electron gas (2DEG) mobility was as high as 2215 cm(2)/V s, with a 2DEG concentration of 1.044 x 10(13)cm(-2). The 50 mm HEMT wafer exhibited a low average sheet resistance of 251.0 Omega/square, with a resistance uniformity of 2.02%. The 0.35 Pin gate length HEMT devices based on this material structure, exhibited a maximum drain current density of 1300 mA/mm, a maximum extrinsic transconductance of 314 mS/mm, a current gain cut-off frequency of 28 GHz and a maximum oscillation frequency of 60 GHz. The maximum output power density of 4.10 W/mm was achieved at 8 GHz, with a power gain of 6.13 dB and a power added efficiency (PAE) of 33.6%. (c) 2006 Elsevier B.V. All rights reserved.

Influence of AlN interfacial layer on electrical properties of high-Al-content Al0.45Ga0.55N/GaN HEMT structure

Unintentionally doped high-Al-content Al0.45Ga0.55N/GaN high electron mobility transistor (HEMT) structures with and without AlN interfacial layer were grown by metal-organic chemical vapor deposition (MOCVD) on two-inch sapphire substrates. The effects of AlN interfacial layer on the electrical properties were investigated. At 300 K, high two-dimensional electron gas (2DEG) density of 1.66 x 10(11) cm(-2) and high electron mobility of 1346 cm(2) V-1 s(-1) were obtained for the high Al content HEMT structure with a 1 nm AlN interfacial layer, consistent with the low average sheet resistance of 287 Omega/sq. The comparison of HEMT wafers with and without AlN interfacial layer shows that high Al content AlGaN/AlN/GaN heterostructures are potential in improving the electrical properties of HEMT structures and the device performances. (c) 2006 Elsevier B.V. All rights reserved.

Self-consistent analysis of double-delta-doped InAlAs/InGaAs/InP HEMTs

We have carried out a theoretical study of double-delta-doped InAlAs/InGaAs/InP high electron mobility transistor (HEMT) by means of the finite differential method. The electronic states in the quantum well of the HEMT are calculated self-consistently. Instead of boundary conditions, initial conditions are used to solve the Poisson equation. The concentration of two-dimensional electron gas (2DEG) and its distribution in the HEMT have been obtained. By changing the doping density of upper and lower impurity layers we find that the 2DEG concentration confined in the channel is greatly affected by these two doping layers. But the electrons depleted by the Schottky contact are hardly affected by the lower impurity layer. It is only related to the doping density of upper impurity layer. This means that we can deal with the doping concentrations of the two impurity layers and optimize them separately. Considering the sheet concentration and the mobility of the electrons in the channel, the optimized doping densities are found to be 5 x 10(12) and 3 x 10(12) cm(-2) for the upper and lower impurity layers, respectively, in the double-delta-doped InAlAs/InGaAs/InP HEMTs.

Semiconductor-metal transition in InSb nanowires and nanofilms under external electric field

The electronic structures, Rashba spin-orbit couplings, and transport properties of InSb nanowires and nanofilms are investigated theoretically. When both the radius of the wire (or the thickness of the film) and the electric field are large, the electron bands and hole bands overlap, and the Fermi level crosses with some bands, which means that the semiconductors transit into metals. Meanwhile, the Rashba coefficients behave in an abnormal way. The conductivities increase dramatically when the electric field is larger than a critical value. This semiconductor-metal transition is observable at the room temperature. (c) 2006 American Institute of Physics.

Metal catalysis-free, direction-controlled planar growth of single-crystalline alpha-Si3N4 nanowires on Si(100) substrate

Single-crystalline alpha-Si3N4 nanowires are controlled to grow perpendicular to the wet-etched trenches in the SiO0.94 film on the plane of the Si substrate without metal catalysis. A detailed characterization is carried out by scanning electron microscopy (SEM) and transmission electron microscopy (TEM). The photoluminescence at 600 nm from alpha-Si3N4 nanowires is attributed to the recombination at the defect state formed by the Si dangling bond N3 equivalent to Si-center dot. The growth mechanism is considered to be related to the catalysis and nitridation of SiO nanoclusters preferably re-deposited around the inner corner of the trenches, as well as faster Si diffusion along the slanting side walls of the trenches. This simple direction-controlled growth method is compatible with the CMOS process, and could facilitate the fabrication of alpha-Si3N4 nanoelectronic or nanophotonic devices on the Si platform.

Theoretical analysis about the influence of channel layer thickness on the 2D electron gas and its distribution in InP-based high-electron-mobility transistors

The principle of high-electron-mobility transistor (HEMT) and the property of two-dimensional electron gas (2DEG) have been analyzed theoretically. The concentration and distribution of 2DEG in various channel layers are calculated by numerical method. Variation of 2DEG concentration in different subband of the quantum well is discussed in detail. Calculated results show that sheet electron concentration of 2DEG in the channel is affected slightly by the thickness of the channel. But the proportion of electrons inhabited in different subbands can be affected by the thickness of the channel. When the size of channel lies between 20-25 nm, the number of electrons occupying the second subband reaches the maximum. This result can be used in parameter design of materials and devices.

Study on Mg memory effect in npn type AlGaN/GaN HBT structures grown by MOCVD

AlGaN/GaN npn heterojunction bipolar transistor structures were grown by low-pressure MOCVD. Secondary ion mass spectroscopy (SIMS) measurements were carried out to study the Mg memory effect and redistribution in the emitter-base junction. The results indicated that there is a Mg-rich film formed in the ongrowing layer after the Cp2Mg source is switched off. The Mg-rich film can be confined in the base section by switching off the Cp2Mg source for appropriate time before the end of base growth. Low temperature growth of the undoped GaN spacer suppresses the Mg redistribution from Mg rich film. The delay rate of the Mg profile in sample C with spacer growing in low temperature is about 56 nm/decade, which becomes sharper than 80 nm/decade of the samples A and B without low temperature spacer. (C) 2005 Elsevier Ltd. All rights reserved.

A novel fast lock-in phase-locked loop frequency synthesizer with direct frequency presetting circuit

This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is -85 dBc/Hz at 10 kHz offset. The synthesizer avoids the tradeoff between the lock-in speed and the phase noise/spurs. The synthesizer monitors the chip temperature and automatically compensates for the variation in frequency with temperature.

A direct digital frequency synthesizer with fourth-order phase domain Delta Sigma noise shaper and 12-bit current-steering DAC

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

Interdot interaction induced zero-bias maximum of the differential conductance in parallel double quantum dots

We have studied the equilibrium and nonequilibrium electronic transports through a double quantum dot coupled to leads in a symmetrical parallel configuration in the presence of both the inter- and the intradot Coulomb interactions. The influences of the interdot interaction and the difference between dot levels on the local density of states (LDOS) and the differential conductance are paid special attention. We find an interesting zero-bias maximum of the differential conductance induced by the interdot interaction, which can be interpreted in terms of the LDOS of the two dots. Due to the presence of the interdot interaction, the LDOS peaks around the dot levels epsilon(i) are split, and as a result, the most active energy level which supports the transport is shifted near to the Fermi level of the leads in the equilibrium situation. (c) 2006 American Institute of Physics.