Effects of techniques of implanting nitrogen into buried oxide on the characteristics of partially depleted SOIPMOSFET

Effects of techniques of implanting nitrogen into buried oxide on the characteristics of the partially depleted silicon-on-insulator (SOI) p-channel metal-oxide-semiconductor field-effect transistors (PMOSFETs) have been studied with three different nitrogen implantation doses, 8 x 10(15), 2 x 10(16), and 1 x 10(17) cm(-2). The experimental results show that this technology can affect the threshold voltage, channel hole mobility and output characteristics of the partially depleted SOI PMOSFETs fabricated with the given material and process. For each type of the partially depleted SOI PMOSFET with nitrided buried oxide, the absolute value of the average threshold voltage increases due to the nitrogen implantation. At the same time, the average channel hole mobility decreases because of the nitrogen implantation. In particular, with the high nitrogen implantation doses, the output characteristic curves of the tested transistors present a distinct kink effect, which normally exists in the characteristic output curves of only partially depleted SOI NMOSFETs.

Comparison of the properties of GaN grown on complex Si-based structures

With the aim of investigating the possible integration of optoelectronic devices, epitaxial GaN layers have been grown on Si(Ill) semiconductor-on-insulator (SOI) and on Si/CoSi2/Si(111) using metalorganic chemical vapor deposition. The samples are found to possess a highly oriented wurtzite structure, a uniform thickness, and abrupt interfaces. The epitaxial orientation is determined as GaN(0001)//Si(111), GaN[1120]//Si[110], and GaN[1010]//Si[112], and the GaN layer is tensilely strained in the direction parallel to the interface. According to Rutherford backscattering/channeling spectrometry and (0002) rocking curves, the crystalline quality of GaN on Si(111) SOI is better than that of GaN on silicide. Room-temperature photoluminescence of GaN/SOI reveals a strong near-band-edge emission at 368 nm (3.37 eV) with a full width at half-maximum of 59 meV. (c) 2005 American Institute of Physics.

Fabrication and analysis of 2x2 thermo-optic SOI waveguide switch with low power consumption and fast response by anisotropy chemical etching

A low power consumption 2 x 2 thermo-optic switch with fast response was fabricated on silicon-on-insulator by anisotropy chemical etching. Blocking trenches were etched on both sides of the phase-shifting arms to shorten device length and reduce power consumption. Thin top cladding layer was grown to reduce power consumption and switching time. The device showed good characteristics, including a low switching power of 145 mW and a fast switching speed of 8 +/- 1 mus, respectively. Two-dimensional finite element method was applied to simulate temperature field in the phase-shifting arm instead of conventional one-dimensional method. According to the simulated result, a new two-dimensional index distribution of phase-shifting arm was determined. Consequently finite-difference beam propagation method was employed to simulate the light propagation in the switch, and calculate the power consumption as well as the switching speed. The experimental results were in good agreement with the theoretical estimations. (C) 2004 Elsevier B.V. All rights reserved.

Thermally tunable optical filter with crystalline silicon as cavity

A novel method to fabricate a thermally tunable filter with a tuning range of 26 nm from 1.504 to 1.530 mum is reported. The high-reffectivity bottom mirror is deposited in the hole formed by anisotropically etching in the basic solution from the backside of the slice with the buried SiO2 layer in silicon-on-insulator substrate as the etching-stop layer. Because of the formation of the mesa and the removing of the substrate of the hole, the power from the metal heater can be more effectively consumed in the crystalline silicon cavity. So it lowers the power consumption and the filter has a higher tuning range. (C) 2004 Elsevier B.V. All rights reserved.

A method for analyzing the coupling of 3-D tapered rib waveguides with fibers

The fields in 3-dimensional tapered waveguides are unstable compared with the fields in the straight waveguides. In the case of waveguide-to-fiber coupling and fiber-to-waveguide coupling, a sequence of short straight waveguides has been modeled to approximate the 3-dimensional tapered waveguide; and the unstable incident and reflected fields, as well as their derivatives, were determined by the beam propagation method(BPM). Then free space radiation mode(FSRM) was employed to calculate the reflected and transmitted powers. Analysis results of the coupling of fiber with silicon-on-insulator(SOI) tapered rib waveguides showed the feasibility of the method.

Effects of the technology of implanting nitrogen into buried oxide layer on the characteristics of partially depleted SOI nMOSFET

The effects, caused by the process of the implantation of nitrogen in the buried oxide layer of SIMOX wafer, on the characteristics of partially depleted silicon-on-insulator nMOSFET have been studied. The experimental results show that the channel electron mobilities of the devices fabricated on the SIMON (separation by implanted oxygen and nitrogen) wafers are lower than those of the devices made on the SIMOX (separation by implanted oxygen) wafers. The devices corresponding to the lowest implantation dose have the lowest mobility within the range of the implantation dose given in this paper. The value of the channel electron mobility rises slightly and tends to a limit when the implantation dose becomes greater. This is explained in terms of the rough Si/SiO2 interface due to the process of implantation of nitrogen. The increasing negative shifts of the threshold voltages for the devices fabricated on the SIMON wafers are also observed with the increase of implanting dose of nitrogen. However, for the devices fabricated on the SIMON wafers with the lowest dose of implanted nitrogen in this paper, their threshold voltages are slightly larger on the average than those prepared on the SIMOX wafers. The shifts are considered to be due to the increment of the fixed oxide charge in SiO2 layer and the change of the density of the interface-trapped charge with the value and distribution included. In particular, the devices fabricated on the SIMON wafers show a weakened kink effect, compared to the ones made on the SIMOX wafers.

Design, fabrication, and characterization of an ultracompact low-loss photonic crystal corner mirror

An ultracompact, low-loss, and broad-band corner mirror, based on photonic crystals, is investigated in this paper. Based on the theoretical analysis of the loss mechanism, the boundary layers of the photonic crystal region are revised to improve the extra losses, and the transmission characteristics are evaluated by using the 3-D finite-difference time-domain method. The device with optimized structure was fabricated on silicon-on-insulator substrate by using electron-beam lithography and inductively coupled plasma etching. The measured extra losses are about 1.1 +/- 0.4 dB per corner mirror for transverse-electronic polarization for the scanning wavelength range of 1510-1630 nm. Dimensions of the achieved PC corner mirror are less than ;7 x 7 mu m(2), which are only about one tenth of conventional wave-guide corner mirrors.

Realization of an ultracompact low-loss photonic crystal corner mirror

We report on the realization and characterization of an ultracompact, low-loss, and broadband corner mirror based on photonic crystals (PCs). By modifying the boundary layers of the PC region, extra losses of 1.1 +/- 0.4 dB per corner mirror are achieved for transverse-electronic polarization for silicon-on-insulator ridge waveguides fabricated by electron beam lithography and inductively coupled plasma etching. Dimensions of the PC corner mirror are less than 7 x 7 mu m(2), which are only about one tenth of conventional waveguide corner mirrors.

Transfer and detection of single electrons using metal-oxide-semiconductor field-effect transistors

A single-electron turnstile and electrometer circuit was fabricated on a silicon-on-insulator substrate. The turnstile, which is operated by opening and closing two metal-oxide-semiconductor field-effect transistors (MOSFETs) alternately, allows current quantization at 20 K due to single-electron transfer. Another MOSFET is placed at the drain side of the turnstile to form an electron storage island. Therefore, one-by-one electron entrance into the storage island from the turnstile can be detected as an abrupt change in the current of the electrometer, which is placed near the storage island and electrically coupled to it. The correspondence between the quantized current and the single-electron counting was confirmed.

Geometry parameter optimization of large cross-sectional S-shaped bent rib waveguides for silicon based optical switches

地址: Chinese Acad Sci, Inst Semicond, State Key Lab Integrated Optoelect, Beijing 100083, Peoples R China

Novel folding 8x8 silicon-based optical matrix switch with tapered waveguides and self-aligned corner mirrors

Novel folding 8 x 8 matrix switches based on silicon on insulator were demonstrated. In the design, single-mode rib waveguides and multimode interferences are connected by optimized tapered waveguides to reduce the mode coupling loss between the two types of waveguides. The self-aligned method was applied to the key integrated turning mirrors for perfect positions and low loss of them. A mixed etching process including inductively coupled plasma and chemical etching was employed to etch waveguides and mirrors, respectively. The compact size of the device is only 20 x 3.2 mm(2). The switch element with high switching speed and low power consumption is presented in the matrix. The average insertion loss of the matrix is about -21 dB, and the excess loss of one mirror is measured of -1.4 dB. The worst crosstalk is larger than 21 dB. Experimental results illuminate that some of the main characteristics of optical matrix switches are. developed in the modified design, which is in accord with theoretic analyses.

Light-propagation characteristics of photonic crystal waveguide based on SOI materials at different polarized states

Straight single-line defect optical waveguides in photonic crystal slabs are designed by the plane wave expansion method and fabricated into silicon-on-insulator (SOI) wafer by 248-nm deep UV lithography. We present an efficient way to measure the light transmission spectrum of the photonic crystal waveguide (PhC WG) at given polarization states. By employing the Mueller/Stokes method, we measure and analyse the light propagation properties of the PhC WG at different polarized states. It is shown that experimental results are in agreement with the simulation results of the three-dimensional finite-difference-time-domain method.

SOI-based 16x16 thermo-optic waveguide switch matrix

A 16 x 16 thermo-optic wavelenght switch matrix has been designed and febricated on silicon-on-insulator wafer. For reducing device lenght, blocking switch matrix configuration is chosen. The building block of a matix is a 2 x 2 cell with Mach-Zehnder interferometer configuration, where a multi-mode interferometer serves as splitters/combiners. Spot size converters and isolating grooves are integrated on the same chip to reduce loss and power consumption. Average power consumption of the switch cell is 220 mW. The switching time of a switch cell is less than 3 mu s.

Research on multi-degree-of-freedom neurons with weighted graphs

In this paper, we redefine the sample points set in the feature space from the point of view of weighted graph and propose a new covering model - Multi-Degree-of-Freedorn Neurons (MDFN). Base on this model, we describe a geometric learning algorithm with 3-degree-of-freedom neurons. It identifies the sample points secs topological character in the feature space, which is different from the traditional "separation" method. Experiment results demonstrates the general superiority of this algorithm over the traditional PCA+NN algorithm in terms of efficiency and accuracy.

A high-performance Si-based MOS electrooptic phase modulator with a shunt-capacitor configuration

A novel Si-based metal-oxide-semiconductor (MOS) electrooptic phase modulator including two shunt oxide layer capacitors integrated on a silicon-on-insulator (SOI) waveguide is simulated and analyzed. The refractive index near the two gate oxide layers is modified by the free carrier dispersion effect induced by applying a positive bias on the electrodes. The theoretical calculation of free carrier distribution coupled with optical guided mode propagation characteristics has been carried out. The influence of the structure parameters such as the width and the doping level of the active region are analyzed. A half-wave voltage V-pi = 4 V is demonstrated with an 8-mm active region length and a 4-mu m width of an inner rib under an accumulation mode. When decreasing the inner rib width to 1 mu m, the phase modulation efficiency is even higher, and the rise and fall times reach 50 and 40 ps, respectively, with a 1.0 x 10(17) cm(-3) doping level in the active region.