131 resultados para Operating Logic


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Se utiliza la lógica borrosa para elaborar un modelo útil para analizar el desarrollo sostenible de proyectos. The sustainable development is defined as “the development that satisfies needs of the present time without endangering the capacity of future generations to satisfy theirs”. The term “sustainable development” represents that balance between the satisfaction of present needs and the future ones, offering options of technological and social growth for reducing the risks meaning trends of topical increase. The idea of sustainability can be analysed from three perspectives: environmental, social and economic

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Gasification is a technology that can replace traditional management alternatives used up to date to deal with this waste (landfilling, composting and incineration) and which fulfils the social, environmental and legislative requirements. The main products of sewage sludge gasification are permanent gases (useful to generate energy or to be used as raw material in chemical synthesis processes), liquids (tars) and char. One of the main problems to be solved in gasification is tar production. Tars are organic impurities which can condense at relatively high temperatures making impossible to use the produced gases for most applications. This work deals with the effect of some primary tar removal processes (performed inside the gasifier) on sewage sludge gasification products. For this purpose, analysis of the gas composition, tar production, cold gas efficiency and carbon conversion were carried out. The tests were performed with air in a laboratory scale plant consisting mainly of a bubbling bed gasifier. No catalyzed and catalyzed (10% wt of dolomite in the bed and in the feeding) tests were carried out at different temperatures (750ºC, 800ºC and 850ºC) in order to know the effect of these parameters in the gasification products. As far as tars were concerned, qualitative and quantitative tar composition was determined. In all tests the Equivalence Ratio (ER) was kept at 0.3. Temperature is one of the most influential variables in sewage sludge gasification. Higher temperatures favoured hydrogen and CO production while CO2 content decreased, which might be partially explained by the effect of the cracking, Boudouard and CO2 reforming reactions. At 850ºC, cold gas efficiency and carbon conversion reached 49% and 76%, respectively. The presence of dolomite as catalyst increased the production of H2 reaching contents of 15.5% by volume at 850 °C. Similar behaviour was found for CO whereas CO2 and CnHm (light hydrocarbons) production decreased. In the presence of dolomite, a tar reduction of up to 51% was reached in comparison with no catalyzed tests, as well as improvements on cold gas efficiency and carbon conversion. Several assays were developed in order to test catalyst performance under more rough gasification conditions. For this purpose, the throughput value (TR), defined as kg sludge “as received” fed to the gasifier per hour and per m2 of cross sectional area of the gasifier, was modified. Specifically, the TR values used were 110 (reference value), 215 and 322 kg/h·m2. When TR increased, the H2, CO and CH4 production decreased while the CO2 and the CnHm production increased. Tar production increased drastically with TR during no catalysed tests what is related to the lower residence time of the gas inside the reactor. Nevertheless, even at TR=322 kg/h·m2, tar production decreased by nearly 50% with in-bed use of dolomite in comparison with no catalyzed assays under the same operating conditions. Regarding relative tar composition, there was an increase in benzene and naphthalene content when temperature increased while the content of the rest of compounds decreased. The dolomite seemed to be effective all over the range of molecular weight studied showing tar removal efficiencies between 35-55% in most cases. High values of the TR caused a significant increase in tar production but a slight effect on tar composition.

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Polysilicon cost impacts significantly on the photovoltaics (PV) cost and on the energy payback time. Nowadays, the besetting production process is the so called Siemens process, polysilicon deposition by chemical vapor deposition (CVD) from Trichlorosilane. Polysilicon purification level for PV is to a certain extent less demanding that for microelectronics. At the Instituto de Energía Solar (IES) research on this subject is performed through a Siemens process-type laboratory reactor. Through the laboratory CVD prototype at the IES laboratories, valuable information about the phenomena involved in the polysilicon deposition process and the operating conditions is obtained. Polysilicon deposition by CVD is a complex process due to the big number of parameters involved. A study on the influence of temperature and inlet gas mixture composition on the polysilicon deposition growth rate, based on experimental experience, is shown. Moreover, CVD process accounts for the largest contribution to the energy consumption of the polysilicon production. In addition, radiation phenomenon is the major responsible for low energetic efficiency of the whole process. This work presents a model of radiation heat loss, and the theoretical calculations are confirmed experimentally through a prototype reactor at our disposal, yielding a valuable know-how for energy consumption reduction at industrial Siemens reactors.

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Adaptive hardware requires some reconfiguration capabilities. FPGAs with native dynamic partial reconfiguration (DPR) support pose a dilemma for system designers: whether to use native DPR or to build a virtual reconfigurable circuit (VRC) on top of the FPGA which allows selecting alternative functions by a multiplexing scheme. This solution allows much faster reconfiguration, but with higher resource overhead. This paper discusses the advantages of both implementations for a 2D image processing matrix. Results show how higher operating frequency is obtained for the matrix using DPR. However, this is compensated in the VRC during evolution due to the comparatively negligible reconfiguration time. Regarding area, the DPR implementation consumes slightly more resources due to the reconfiguration engine, but adds further more capabilities to the system.

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Side Channel Attacks (SCAs) typically gather unintentional (side channel) physical leakages from running crypto-devices to reveal confidential data. Dual-rail Precharge Logic (DPL) is one of the most efficient countermeasures against power or EM side channel threats. This logic relies on the implementation of complementary rails to counterbalance the data-dependent variations of the leakage from dynamic behavior of the original circuit. However, the lack of flexibility of commercial FPGA design tools makes it quite difficult to obtain completely balanced routings between complementary networks. In this paper, a controllable repair mechanism to guarantee identical net pairs from two lines is presented: i. repairs the identical yet conflict nets after the duplication (copy & paste) from original rail to complementary rail, and ii. repairs the non-identical nets in off-the-stock DPL circuits; These rerouting steps are carried out starting from a placed and routed netlist using Xilinx Description Language (XDL). Low level XDL modifications have been completely automated using a set of APIs named RapidSmith. Experimental EM attacks show that the resistance level of an AES core after the automatic routing repair is increased in a factor of at least 3.5. Timing analyses further demonstrate that net delay differences between complementary networks are minimized significantly.

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This article aims to quantify the efficiency of mobile operators in Spain and other European countries such as France and Germany. The period considered is from 2002 to 2008. Linear regression is used to analyze the relationship between growth in revenue and gross operating margin (EBITDA) generated by the relevant operators and the aggregate industry in each country. At the industry level, it is shown that (i) there is a strong correlation between revenue and margin; and (ii) this correlation weakens when competitive intensity grows. At the operator level, those which achieved larger increases in revenues did not sacrifice their margins, but offset the additional investments and costs required to achieve said growth through economies of scale.

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Solar drying is one of the important processes used for extending the shelf life of agricultural products. Regarding consumer requirements, solar drying should be more suitable in terms of curtailing total drying time and preserving product quality. Therefore, the objective of this study was to develop a fuzzy logic-based control system, which performs a ?human-operator-like? control approach through using the previously developed low-cost model-based sensors. Fuzzy logic toolbox of MatLab and Borland C++ Builder tool were utilized to develop a required control system. An experimental solar dryer, constructed by CONA SOLAR (Austria) was used during the development of the control system. Sensirion sensors were used to characterize the drying air at different positions in the dryer, and also the smart sensor SMART-1 was applied to be able to include the rate of wood water extraction into the control system (the difference of absolute humidity of the air between the outlet and the inlet of solar dryer is considered by SMART-1 to be the extracted water). A comprehensive test over a 3 week period for different fuzzy control models has been performed, and data, obtained from these experiments, were analyzed. Findings from this study would suggest that the developed fuzzy logic-based control system is able to tackle difficulties, related to the control of solar dryer process.

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The optical bistability occurring in laser diode amplifiers is used to design an all-optical logic gate capable to provide the whole set of logic functions. The structure of the reported logic gate is based on two connected 1550nm laser amplifiers (Fabry-Perot and distributed feedback laser amplifiers).

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This paper reports a model of the mammalian retina as well as an interpretation of some functions of the visual cortex. Its main objective is to simulate some of the behaviors observed at the different retina cells depending on the characteristics of the light impinging onto the photoreceptors. This simulation is carried out with a simple structure employed previously as basic building block of some optical computer architectures. Its possibility to perform any type of Boolean function allows a wide range of behaviors.

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The purpose of this document is to create a modest integration guide for embedding a Linux Operating System on ZedBoard development platform, based on Xilinx’s Zynq-7000 All Programmable System on Chip which contains a dual core ARM Cortex-A9 and a 7 Series FPGA Artix-7. The integration process has been structured in four chapters according to the logic generation of the different parts that compose the embedded system. With the intention of automating the generation process of a complete Linux distribution specific for ZedBoard platform, BuildRoot development platform it is used. Once the embedding process finished, it was decided to add to the system the required functionalities for adding support for IEEE1588 Standard for Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, through a user space Linux program which implements the protocol. That PTP user space implementation program has been cross-compiled, executed on target and tested for evaluating the functionalities added. RESUMEN El propósito de este documento es crear una modesta guía de integración de un sistema operativo Linux para la plataforma de desarrollo ZedBoard, basada en un System on Chip del fabricante Xilinx llamado Zynq-7000. Este System on Chip está compuesto por un procesador de doble núcleo ARM Cortex-A9 y una FPGA de la Serie 7 equiparable a una Artix-7. El proceso de integración se ha estructurado en cuatro grandes capítulos que se rigen según el orden lógico de generación de las distintas partes por las que el sistema empotrado está compuesto. Con el ánimo de automatizar el proceso de creación de una distribución de Linux específica para la plataforma ZedBoard, se ha utilizado la plataforma de desarrollo BuildRoot. Una vez terminado el proceso de integración del sistema empotrado, se procedió a dar dotar al sistema de las funcionalidades necesarias para dar soporte al estándar de sincronización de relojes en redes de área local, PTP IEEE1588, a través de una implementación del mismo en un programa de lado de usuario el cual ha sido compilado, ejecutado y testeado para evaluar el correcto funcionamiento de las funcionalidades añadidas.

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A new methodology to study irregular behaviours in logic cells is reported. It is based on two types of diagrams, namely phase and working diagrams. Sets of four bits are grouped and represented by their hexadecimal equivalent. Some hexadecimal numbers correspond to certain logic functions. The influence of the internal and external tolerances, namely those appearing in the employed devices and in the working signals, may be analysed with this method. Its importance in the case of logic structures with chaotic behaviours is studied.

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A new type of photonic logic, based on the use of nematic liquid crystals is proposed. The system takes advantage of the refractive-index changes induced by laser beams. Examples of AND, OR and NOR functions are presented.

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El punto de vista de muchas otras aplicaciones que modifican las reglas de computación. En segundo lugar, y una vez generalizado el concepto de independencia, es necesario realizar un estudio exhaustivo de la efectividad de las herramientas de análisis en la tarea de la paralelizacion automática. Los resultados obtenidos de dicha evaluación permiten asegurar de forma empírica que la utilización de analizadores globales en la tarea de la paralelizacion automática es vital para la consecución de una paralelizarían efectiva. Por último, a la luz de los buenos resultados obtenidos sobre la efectividad de los analizadores de flujo globales basados en la interpretación abstracta, se presenta la generalización de las herramientas de análisis al contexto de los lenguajes lógicos restricciones y planificación dinámica.

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A possible approach to the synchronization of chaotic circuits is reported. It is based on an Optically Programmable Logic Cell and the signals are fully digital. A method to study the characteristics of the obtained chaos is reported as well as a new technique to compare the obtained chaos from an emitter and a receiver. This technique allows the synchronization of chaotic signals. The signals received at the receiver, composed by the addition of information and chaotic signals, are compared with the chaos generated there and a pure information signal can be detected. Its application to cryptography in Optical Communications comes directly from these properties. The model here presented is based on a computer simulation.

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Digital chaotic behavior in an optically processing element is analyzed. It was obtained as the result of processing two fixed trains of bits. The process is performed with an optically programmable logic gate. Possible outputs, for some specific conditions of the circuit, are given. Digital chaotic behavior is obtained, by using a feedback configuration. Different ways to analyze a digital chaotic signal are presented.